AD7718BR Analog Devices Inc, AD7718BR Datasheet
AD7718BR
Specifications of AD7718BR
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AD7718BR Summary of contents
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CHOP CHOP DVDD DGND AIN1 AIN2 AIN3 AIN4 AIN5 MUX AIN6 AIN7 AIN8 AINCOM AVDD SPI and QSPI are trademarks of Motorola Inc. MICROWIRE is a trademark of National Semiconductor Corp. VREF Select is a trademark of Analog Devices, ...
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AD7708/AD7718 FEATURES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 ...
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AD7718 SPECIFICATIONS REFIN(+) = 2.5 V; REFIN(–) = AGND; AGND = DGND = 0 V; XTAL1/XTAL2 = 32.768 kHz Crystal Input Buffer Enabled. All specifications T T unless otherwise noted.) MAX Parameter AD7718 (CHOP DISABLED) Output Update Rate 2 No ...
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AD7718–SPECIFICATIONS 2 REFIN(–) = AGND; AGND = DGND = 0 V; XTAL1/XTAL2 = 32.768 kHz Crystal Input Buffer Enabled. All specifications T Parameter AD7718 (CHOP ENABLED) Output Update Rate 2 No Missing Codes Resolution Output Noise and Update ...
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Parameter LOGIC INPUTS (Continued) 2 SCLK Only (Schmitt-Triggered Input) V T(+) V T(–) V – V T(+) T(–) V T(+) V T(–) V –V T(+) T(–) 2 XTAL1 Only V , Input Low Voltage INL V , Input High Voltage ...
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AD7708/AD7718 AD7708 SPECIFICATIONS REFIN(+) = 2.5 V; REFIN(–) = AGND; AGND = DGND = 0 V; XTAL1/XTAL2 = 32.768 kHz Crystal Input Buffers Enabled. All specifications T T unless otherwise noted.) MAX Parameter AD7708 (CHOP DISABLED) Output Update Rate 2 ...
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Parameter AD7708 (CHOP ENABLED) Output Update Rate 2 No Missing Codes Resolution Output Noise and Update Rates Integral Nonlinearity 3 Offset Error 4 Offset Error Drift vs. Temp 3 Full-Scale Error 4 Gain Drift vs. Temp ANALOG INPUTS Differential Input ...
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AD7708 AD7718–SPECIFICATIONS 2 REFIN(–) = AGND; AGND = DGND = 0 V; XTAL1/XTAL2 = 32.768 kHz Crystal Input Buffer Enabled. All specifications T Parameter LOGIC INPUTS (Continued) 2 SCLK Only (Schmitt-Triggered Input) V T(+) V T(–) V –V ...
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TIMING CHARACTERISTICS DGND = 0 V; XTAL = 32.768 kHz; Input Logic Logic Limit at T Parameter (B Version) t 32.768 Read Operation ...
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... Model AD7708BR AD7708BRU EVAL-AD7708EB AD7718BR AD7718BRU EVAL-AD7718EB CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD7708/AD7718 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high-energy electrostatic discharges ...
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SCLK DIN MSB RDY SCLK MSB DOUT AD7708/AD7718 t 16 LSB ...
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AD7708/AD7718 Pin No Mnemonic Function 1 AIN7 Analog Input Channel 7. Programmable-gain analog input that can be used as a pseudo- differential input when used with AINCOM the positive input of a fully-differential input pair when used with ...
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Pin No Mnemonic Function CS Chip Select Input. This is an active low logic input used to select the AD7708/AD7718. CS can 21 be used to select the AD7708/AD7718 in systems with more than one device on the serial bus ...
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AD7708/AD7718 –Typical Performance Characteristics 8389600 REFIN1(+)–REFIN1(– INPUT RANGE = 20mV UPDATE RATE = 19.79Hz 8389400 8389200 8389000 8388800 8388600 8388400 8388200 RMS NOISE = 0.58 V rms 8388000 0 100 200 ...
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ADC CIRCUIT INFORMATION The AD7708/AD7718 incorporates a 10-channel multiplexer with a sigma-delta ADC, on-chip programmable gain amplifier and digital filtering intended for the measurement of wide dynamic range, low frequency signals such as those in weigh-scale, strain-gauge, pressure transducer, or ...
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AD7708/AD7718 Table I. ADC Conversion and Settling Times for Various SF Words with CHOP = 0 SF Data Update Rate Word f (Hz) ADC 13 105.3 23 59.36 27 50.56 45 30.3 69 (Default) 19. 182 7.5 255 ...
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FREQUENCY – 255 OUTPUT DATA RATE = 5.35Hz INPUT BANDWIDTH = 1.28Hz 50Hz REJECTION = –93dB, 50Hz 1Hz REJECTION = ...
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AD7708/AD7718 Table II. Typical Output RMS Noise vs. Input Range and Update Rate for AD7718 with Chop Enabled (CHOP = 0); Output RMS Noise Data Update Word Rate (Hz 105.3 1.50 1.50 23 59.36 ...
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SIGNAL CHAIN OVERVIEW CHOP DISABLED (CHOP = 1) With CHOP =1 chopping is disabled. With chopping disabled the available output rates vary from 16.06 Hz (62.26 ms) to 1365.33 Hz (0.73 ms). The range of applicable SF words is from ...
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AD7708/AD7718 0 –20 –40 –60 –80 –100 –120 –140 –160 –180 –200 FREQUENCY – OUTPUT DATA RATE = 60.2Hz SETTLING TIME = 49.8ms INPUT BANDWIDTH = 15.5Hz 50Hz REJECTION ...
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Table VII. Typical Output RMS Noise vs. Input Range and Update Rate for AD7718 with Chop Disabled (CHOP = 1); Output RMS Noise Data Update Word Rate (Hz 1365.33 30.31 13 315.08 2.47 66 ...
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AD7708/AD7718 ON-CHIP REGISTERS The AD7708 and AD7718 are controlled and configured via a number of on-chip registers which are shown in Figure 15. The first of these registers is the communications register which is used to control all operations on ...
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Register Name Type Size Communications Write Only 8 Bits CR7 CR6 CR5 CR4 CR3 WEN R/W 0(0) 0(0) A3(0) Status Register Read Only 8 Bits Mode Register Read/Write ...
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AD7708/AD7718 Power-On/Reset Register Name Type Size AD7718 Offset Register Read/Write 24 Bits AD7718 Gain Register Read/Write 24 Bits AD7708 Offset Register Read/Write 16 Bits AD7708 Gain Register Read/Write 16 Bits AD7708 ID Register Read 8 Bits AD7718 ID Register Read ...
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Communications Register (A3, A2, A1 The Communications Register is an 8-bit write-only register. All communications to the part must start with a write operation to the Communications Register. The data written to the Communications ...
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AD7708/AD7718 Status Register (A3, A2, A1 Power-On-Reset = 00Hex) The ADC Status Register is an 8-bit read-only register. To access the ADC Status Register, the user must write to the Communica- tions Register selecting ...
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Mode Register (A3, A2, A1 Power-On-Reset = 00Hex) The Mode Register is an 8-bit register from which data can be read or to which data can be written. This register configures the operating modes ...
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AD7708/AD7718 Operating Characteristics when Addressing the Mode and Control Registers 1. Any change to the MD bits will immediately reset the ADCs. A write to the MD2–MD0 bits with no change is also treated as a reset. 2. Once the ...
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Table XVI. ADC Control Register (ADCCON) Bit Designations (continued) AD0C2 RN2 ADC Range Bits AD0C1 RN1 Written by the user to select the ADC input range as follows AD0C0 RN0 RN2 Filter ...
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AD7708/AD7718 I/O Control Register (IOCON): (A3, A2, A1 Power-On-Reset = 00Hex) The IOCON Register is an 8-bit register from which data can be read or to which data can be written. This register is ...
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Bipolar Mode With an analog input voltage of (–1.024 V With an analog input voltage the output code is 8000Hex for the AD7708 and 800000Hex for the AD7718. With an analog input voltage of (+1.024 V /GAIN), ...
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AD7708/AD7718 Configuring the AD7708/AD7718 All user-accessible registers on the AD7708 and AD7718 are accessed via the serial interface. Communication with any of these registers is initiated by first writing to the Communica- tions Register. Figures 16, 17, and 18 show ...
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Write to the ADCCON register to select the channel to be calibrated, its input range, and operation in unipolar or bipolar mode. 2. Write to the mode register selecting chop or nonchop mode of operation, select the reference, buffered/unbuffered ...
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AD7708/AD7718 DIGITAL INTERFACE As previously outlined, the AD7708/AD7718’s programmable functions are controlled using a set of on-chip registers. Data is written to these registers via the part’s serial interface and read access to the on-chip registers is also provided by ...
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AD7708/AD7718 to 68HC11 Interface Figure 19 shows an interface between the AD7708/AD7718 and the 68HC11 microcontroller. The diagram shows the minimum (3-wire) interface with CS on the AD7708/AD7718 hardwired low. In this scheme, the RDY bit of the Status Register ...
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AD7708/AD7718 AD7708/AD7718-to-ADSP-2103/ADSP-2105 Interface Figure 21 shows an interface between the AD7708/AD7718 and the ADSP-2103/ADSP-2105 DSP processor. In the interface shown, the RDY bit of the Status Register is again monitored to determine when the Data Register is updated. The alternative ...
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Analog Input Channels The input multiplexer on AD7708/AD7718 can be configured as either 10-input channel device. This configuration is selected using the CHCON bit in the MODE register. With CHCON = 0 (Figure 23), the user has ...
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AD7708/AD7718 Nonchop Mode of Operation (CHOP = 1) Chopping is enabled and disabled using the CHOP bit in the mode register. Chopping is disabled by loading the chop bit in the mode register. With chopping disabled the ...
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The output code for any analog input voltage on the AD7708 can be represented as follows: Code = (AIN × GAIN × 2 )/(1.024 × where AIN is the analog input voltage, GAIN is the PGA gain, i.e., ...
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AD7708/AD7718 Calibration The AD7708/AD7718 provides four calibration modes that can be programmed via the mode bits in the mode register. One of the major benefits of the AD7708/AD7718 is that it is factory- calibrated with chopping enabled as part of ...
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Good decoupling is important when using high resolution ADCs. All analog supplies should be decoupled with 10 µF tantalum in parallel with 0.1 µF capacitors to AGND. To achieve the best from these decoupling components, they have to be placed ...
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AD7708/AD7718 Converting Single-Ended Inputs The AD7708/AD7718 generally operates in buffered mode. This places a restriction of AGND + 100 mV to AVDD – 100 mV on the absolute and common-mode voltages that can be applied to any input on the ...
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Optimizing Throughput while Maximizing 50 Hz and 60 Hz Rejection in a Multiplexed Data Acquisition System The AD7708/AD7718 can be optimized for one of two modes of operation. Operating the AD7708/AD7718 with chopping enabled (CHOP = 0) optimizes the AD7708/AD7718 ...
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AD7708/AD7718 PIN 1 0.0118 (0.30) 0.0040 (0.10) PIN 1 0.006 (0.15) 0.002 (0.05) SEATING PLANE OUTLINE DIMENSIONS Dimensions shown in inches and (mm). 28-Lead Plastic SOIC (R-28) 0.7125 (18.10) 0.6969 (17.70 0.2992 (7.60) 0.2914 (7.40) 0.4193 (10.65) 1 ...