AD7718BRUZ-REEL7 Analog Devices Inc, AD7718BRUZ-REEL7 Datasheet - Page 16

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AD7718BRUZ-REEL7

Manufacturer Part Number
AD7718BRUZ-REEL7
Description
4/5 Chnl Dif Or 8/10 Chnl 24-Bit ADC
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD7718BRUZ-REEL7

Number Of Bits
24
Sampling Rate (per Second)
1.37k
Data Interface
DSP, MICROWIRE™, QSPI™, Serial, SPI™
Number Of Converters
1
Power Dissipation (max)
3.84mW
Voltage Supply Source
Analog and Digital
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
28-TSSOP (0.173", 4.40mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
EVAL-AD7718EBZ - BOARD EVALUATION FOR AD7718
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
AD7718BRUZ-REEL7
AD7718BRUZ-REEL7TR

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AD7718BRUZ-REEL7
Manufacturer:
ADI/亚德诺
Quantity:
20 000
SF
Word
13
23
27
45
69 (Default)
91
182
255
The overall frequency response is the product of a sinc
sinc response. There are sinc
3 × f
of f
following equation:
Normal-mode rejection is the major function of the digital filter
on the AD7708/AD7718. The normal mode 50 ± 1 Hz rejection
with an SF word of 82 is typically –100 dB. The 60 ± 1 Hz
rejection with SF = 68 is typically –100 dB. Simultaneous 50 Hz
and 60 Hz rejection of better than 60 dB is achieved with an SF
of 69. Choosing an SF word of 69 places notches at both 50 Hz
and 60 Hz. Figures 5 to 9 show the filter rejection for a selection
of SF words.
The frequency response of the filter H (f) is as follows:
where
f
SF = value programmed into SF Register,
f
The following plots show the filter frequency response for a
variety of update rates from 5 Hz to 105 Hz.
AD7708/AD7718
MOD
OUT
SF
Table I. ADC Conversion and Settling Times for Various
SF Words with CHOP = 0
ADC
1
ADC
= f
×
= 32,768 Hz,
8
/2. The 3 dB frequency for all values of SF obeys the
MOD
×
and there are sinc notches at odd integer multiples
sin (
/(SF × 8 × 3).
SF
sin (
× × ×
π
8
Data Update Rate
f
105.3
59.36
50.56
30.3
19.79
15
7.5
5.35
×
ADC
f (3 dB) = 0.24 × f
f f
π
/
MOD
(Hz)
f f
/
)
MOD
3
notches at integer multiples of
)
 ×
3
ADC
1
2
×
sin (
sin (
2
Settling Time
t
19.04
33.69
39.55
65.9
101.07
133.1
266.6
373.54
× ×
SETTLE
π
π
×
f f
/
3
f f
/
and a
OUT
(ms)
OUT
)
)
–100
–120
–140
–160
–200
–100
–120
–140
–160
–180
–20
–40
–60
–80
–20
–40
–60
–80
0
0
0
0
SF = 13
OUTPUT DATA RATE = 105Hz
INPUT BANDWIDTH = 25.2Hz
FIRST NOTCH = 52.5Hz
50Hz REJECTION = –23.6dB, 50Hz 1Hz REJECTION = –20.5dB
60Hz REJECTION = –14.6dB, 60Hz 1Hz REJECTION = –13.6dB
SF = 82
OUTPUT DATA RATE = 16.65Hz
INPUT BANDWIDTH = 4Hz
50Hz REJECTION = –171dB, 50Hz 1Hz REJECTION = –100dB
60Hz REJECTION = –58dB, 60Hz 1Hz REJECTION = –53dB
50 100 150 200 250 300 350 400 450 500 550 600
10
20
30
FREQUENCY – Hz
FREQUENCY – Hz
40
50
60
70
80
90
650
100
700

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