AD7732BRU Analog Devices Inc, AD7732BRU Datasheet - Page 10

• Manufacturer Part Number: AD7732BRU
• Description: Analog/Digital Converter IC Number Of Bits:24
• Manufacturer: Analog Devices Inc

Specifications of AD7732BRU

• Interface Type: Serial
• Supply Voltage Max.: 5V
• Package/case: 24-TSSOP
• Leaded Process Compatible: No
• A/d, D/a Features: DSP, MicroWire, QSPI, SPI
• Adc Resolution: 24-Bit
• Rohs Status: RoHS non-compliant
• Number Of Bits: 24
• Sampling Rate (per Second): 15.4k
• Data Interface: DSP, MICROWIRE™, QSPI™, Serial, SPI™
• Number Of Converters: 1
• Power Dissipation (max): 100mW
• Voltage Supply Source: Analog and Digital
• Operating Temperature: -40°C ~ 105°C
• Mounting Type: Surface Mount
• Package / Case: 28-TSSOP (0.173", 4.40mm Width)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With: EVAL-AD7732EBZ - BOARD EVAL FOR AD7732
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

AD7732
OUTPUT NOISE AND RESOLUTION SPECIFICATION
The AD7732 can be operated with chopping enabled or
disabled, allowing the ADC to be programmed to either
optimize the throughput rate and channel switching time or to
optimize the offset drift performance. Noise tables for these two
primary modes of operation are outlined below for a selection
of output rates and settling times.
The AD7732 noise performance depends on the selected
chopping mode, the filter word (FW) value, and the selected
analog input range. The AD7732 noise will not vary
significantly with MCLK frequency.
Chopping Enabled
The first mode, in which the AD7732 is configured with
chopping enabled (CHOP = 1), provides very low noise with
Table 4. Typical Output RMS Noise in µV vs. Conversion Time and Input Range with Chopping Enabled
FW
Table 5. Typical Effective Resolution in Bits vs. Conversion Time and Input Range with Chopping Enabled
FW
Table 6. Typical Peak-to-Peak Resolution in Bits vs. Conversion Time and Input Range with Chopping Enabled
FW
127
127
127
46
22
17
46
22
17
46
22
17
8
6
2
8
6
2
8
6
2
Conversion Time
Conversion Time
Conversion Time
Register
Register
Register
AEh
96h
91h
88h
86h
82h
FFh
AEh
96h
91h
88h
86h
82h
AEh
FFh
FFh
96h
91h
88h
86h
82h
Conversion Time
Conversion Time
Conversion Time
2686
(µs)
(µs)
(µs)
2686
2686
999
499
395
207
166
999
499
395
207
166
999
499
395
207
166
82
82
82
Output Data Rate
Output Data Rate
Output Data Rate
12166
12166
12166
(Hz)
1001
2005
2534
4826
6041
(Hz)
1001
2005
2534
4826
6041
(Hz)
1001
2005
2534
4826
6041
372
372
372
Rev. 0 | Page 10 of 32
–3 dB Frequency
–3 dB Frequency
–3 dB Frequency
lower output rates. Table 4 to Table 6 show the –3 dB
frequencies and typical performance versus the channel
conversion time and equivalent output data rate, respectively.
shows the typical output rms noise. Table 5 shows the typical
effective resolution based on rms noise. Table 6 shows the
typical output peak-to-peak resolution, representing values for
which there will be no code flicker within a 6-sigma limit. The
peak-to-peak resolutions are not calculated based on rms noise
but on peak-to-peak noise.
These typical numbers are generated from 4096 data samples
acquired in continuous conversion mode with an analog input
voltage set to 0 V and MCLK = 6.144 MHz. The conversion
time is selected via the channel conversion time register.
(Hz)
1040
1300
2500
3100
6300
(Hz)
(Hz)
1040
1300
2500
3100
6300
1040
1300
2500
3100
6300
200
520
520
200
200
520
Input Range/Peak-to-Peak Resolution (Bits)
±10 V
±10 V
18.1
17.4
16.9
16.7
16.2
15.8
15.0
21.0
20.3
19.7
19.5
19.0
18.7
17.3
Input Range/Effective Resolution (Bits)
0 V to +10 V
0 V to +10 V
16.4
17.1
15.9
15.7
15.2
14.8
13.4
20.0
19.3
18.7
18.5
18.0
17.7
16.3
RMS Noise
120.0
(µV)
15.5
22.7
26.1
39.2
46.0
9.6
±5 V
17.1
16.4
15.9
15.7
15.2
14.8
13.4
±5 V
20.0
19.3
18.7
18.5
18.0
17.7
16.3
0 V to +5 V
0 V to +5 V
19.0
18.3
17.7
17.5
17.0
16.7
15.3
16.1
15.4
14.9
14.7
14.2
13.8
12.4