AD7732BRU Analog Devices Inc, AD7732BRU Datasheet - Page 15

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AD7732BRU

Manufacturer Part Number
AD7732BRU
Description
Analog/Digital Converter IC Number Of Bits:24
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD7732BRU

Interface Type
Serial
Supply Voltage Max.
5V
Package/case
24-TSSOP
Leaded Process Compatible
No
A/d, D/a Features
DSP, MicroWire, QSPI, SPI
Adc Resolution
24-Bit
Rohs Status
RoHS non-compliant
Number Of Bits
24
Sampling Rate (per Second)
15.4k
Data Interface
DSP, MICROWIRE™, QSPI™, Serial, SPI™
Number Of Converters
1
Power Dissipation (max)
100mW
Voltage Supply Source
Analog and Digital
Operating Temperature
-40°C ~ 105°C
Mounting Type
Surface Mount
Package / Case
28-TSSOP (0.173", 4.40mm Width)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With
EVAL-AD7732EBZ - BOARD EVAL FOR AD7732
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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Register Access
The AD7732 is configurable through a series of registers. Some
of them configure and control general AD7732 features, while
others are specific to each channel. The register data widths
vary from 8 bits to 24 bits. All registers are accessed through the
communications register, i.e., any communication to the
AD7732 must start with a write to the communications register
specifying which register will be subsequently read or written.
Communications Register
8 Bits, Write-Only Register, Address 00h
All communications to the part must start with a write
operation to the communications register. The data written to
Bit
Mnemonic
Bit
7
6
5–0
Table 14.
Bit 2
0
0
Mnemonic
Bit 1
0
1
Address
R/W
0
Bit 0
0
0
Bit 7
0
Description
This bit must be 0 for proper operation.
A 0 in this bit indicates that the next operation will be a write to a specified register. A 1 in this bit indicates
that the next operation will be a read from a specified register.
Address specifying to which register the read or write operation will be directed. For channel specific registers,
Bit 1 specifies the channel number. When the subsequent operation writes to the Mode register, Bit 1 specifies
the channel selected for operation determined by the mode register value (see Table 14).
Channel
0
1
Bit 6
Input
AIN0(+) – AIN0(–)
AIN1(+) – AIN1(–)
R/W
Bit 5
Rev. 0 | Page 15 of 32
Bit 4
the communications register determines whether the
subsequent operation will be a read or write and to which
register this operation will be directed. The digital interface
defaults to expect write operation to the communications
register after power-on, after reset, or after the subsequent read
or write operation to the selected register is complete. If the
interface sequence is lost, the part can be reset by writing at
least 32 serial clock cycles with DIN high and CS low. (Note that
all of the parts, including the modulator, filter, interface, and all
registers are reset in this case.) Remember to keep DIN low
while reading 32 bits or more either in continuous read mode or
with the DUMP bit and “24/16” bit in the mode register set.
Bit 3
6-Bit Register Address
Bit 2
Bit 1
AD7732
Bit 0

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