AD9222BCPZ-40 Analog Devices Inc, AD9222BCPZ-40 Datasheet - Page 33

• Manufacturer Part Number: AD9222BCPZ-40
• Description: IC,A/D CONVERTER,OCTAL,12-BIT,LLCC,64PIN
• Manufacturer: Analog Devices Inc

Specifications of AD9222BCPZ-40

• Number Of Bits: 12
• Sampling Rate (per Second): 40M
• Data Interface: Serial, SPI™
• Number Of Converters: 8
• Power Dissipation (max): 722mW
• Voltage Supply Source: Analog and Digital
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 64-LFCSP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AD9222-65EBZ - BOARD EVALUATION AD9222 65MSPSAD9222-50EBZ - BOARD EVALUATION FOR AD9222
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

SERIAL PORT INTERFACE (SPI)
The AD9222 serial port interface allows the user to configure
the converter for specific functions or operations through a
structured register space provided inside the ADC. This gives
the user added flexibility and customization, depending on the
application. Addresses are accessed via the serial port and can
be written to or read from via the port. Memory is organized
into bytes that can be further divided down into fields, as doc-
umented in the Memory Map section. Detailed operational
information can be found in the AN-877 Application Note,
Interfacing to High Speed ADCs via SPI.
There are three pins that define the SPI: SCLK, SDIO, and CSB
(see Table 14). The SCLK pin is used to synchronize the read
and write data presented to the ADC. The SDIO pin is a dual-
purpose pin that allows data to be sent to and read from the
internal ADC memory map registers. The CSB pin is an active
low control that enables or disables the read and write cycles.
Table 14. Serial Port Pins
Pin
SCLK
SDIO
CSB
The falling edge of the CSB in conjunction with the rising edge
of the SCLK determines the start of the framing sequence. During
an instruction phase, a 16-bit instruction is transmitted followed by
one or more data bytes, which is determined by Bit Field W0 and
Bit Field W1. An example of the serial timing and its definitions
can be found in Figure 84 and Table 15. During normal operation,
CSB is used to signal to the device that SPI commands are to be
received and processed. When CSB is brought low, the device
processes SCLK and SDIO to process instructions. Normally,
Function
Serial Clock. The serial shift clock input. SCLK is used to
synchronize serial interface reads and writes.
Serial Data Input/Output. A dual-purpose pin. The
typical role for this pin is an input or output, depending
on the instruction sent and the relative position in the
timing frame.
Chip Select Bar (Active Low). This control gates the read
and write cycles.
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CSB remains low until the communication cycle is complete.
However, if connected to a slow device, CSB can be brought
high between bytes, allowing older microcontrollers enough
time to transfer data into shift registers. CSB can be stalled
when transferring one, two, or three bytes of data. When W0 and
W1 are set to 11, the device enters streaming mode and continues
to process data, either reading or writing, until CSB is taken
high to end the communication cycle. This allows complete
memory transfers without requiring additional instructions.
Regardless of the mode, if CSB is taken high in the middle of a
byte transfer, the SPI state machine is reset and the device waits
for a new instruction.
In addition to the operation modes, the SPI port configuration
influences how the AD9222 operates. For applications that do
not require a control port, the CSB line can be tied and held high.
This places the remainder of the SPI pins into their secondary
modes, as defined in the SDIO/ODM Pin and SCLK/DTP Pin
sections. CSB can also be tied low to enable 2-wire mode. When
CSB is tied low, SCLK and SDIO are the only pins required for
communication. Although the device is synchronized during
power-up, the user should ensure that the serial port remains
synchronized with the CSB line when using this mode. When
operating in 2-wire mode, it is recommended to use a 1-, 2-, or
3-byte transfer exclusively. Without an active CSB line, streaming
mode can be entered but not exited.
In addition to word length, the instruction phase determines if
the serial frame is a read or write operation, allowing the serial
port to be used to both program the chip and read the contents
of the on-chip memory. If the instruction is a readback operation,
performing a readback causes the SDIO pin to change from an
input to an output at the appropriate point in the serial frame.
Data can be sent in MSB- or LSB-first mode. MSB-first mode
is the default at power-up and can be changed by adjusting the
configuration register. For more information about this and
other features, see the AN-877 Application Note, Interfacing to
High Speed ADCs via SPI.
AD9222