AD9520-2BCPZ Analog Devices Inc, AD9520-2BCPZ Datasheet - Page 65

• Manufacturer Part Number: AD9520-2BCPZ
• Description: 12/24 Channel Clock Gen 2,25GH
• Manufacturer: Analog Devices Inc
• Type: Clock Generator, Fanout Distributionr

Specifications of AD9520-2BCPZ

• Design Resources: Synchronizing Multiple AD9910 1 GSPS Direct Digital Synthesizers (CN0121) Phase Coherent FSK Modulator (CN0186)
• Pll: Yes
• Input: CMOS, LVDS, LVPECL
• Output: CMOS, LVPECL
• Number Of Circuits: 1
• Ratio - Input:output: 2:12, 2:24
• Differential - Input:output: Yes/Yes
• Frequency - Max: 2.33GHz
• Divider/multiplier: Yes/No
• Voltage - Supply: 3.135 V ~ 3.465 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 64-LFCSP
• Frequency-max: 2.33GHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Addr
(Hex)
A05
A06
A07
A08
A09
A0A
A0B
A0C
A0D
A0E
A0F
A10
A11
A12
A13
A14
A15
A16
A17
to
AFF
Parameter
EEPROM
Buffer Segment
Register 6
EEPROM
Buffer Segment
Register 7
EEPROM
Buffer Segment
Register 8
EEPROM
Buffer Segment
Register 9
EEPROM
Buffer Segment
Register 10
EEPROM
Buffer Segment
Register 11
EEPROM
Buffer Segment
Register 12
EEPROM
Buffer Segment
Register 13
EEPROM
Buffer Segment
Register 14
EEPROM
Buffer Segment
Register 15
EEPROM
Buffer Segment
Register 16
EEPROM
Buffer Segment
Register 17
EEPROM
Buffer Segment
Register 18
EEPROM
Buffer Segment
Register 19
EEPROM
Buffer Segment
Register 20
EEPROM
Buffer Segment
Register 21
EEPROM
Buffer Segment
Register 22
EEPROM
Buffer Segment
Register 23
Bit 7 (MSB)
0
0
0
0
0
EEPROM Buffer Segment Register 11 (default: Bits[15:8] of starting register address for Group 4)
EEPROM Buffer Segment Register 14 (default: Bits[15:8] of starting register address for Group 5)
EEPROM Buffer Segment Register 17 (default: Bits[15:8] of starting register address for Group 6)
EEPROM Buffer Segment Register 20 (default: Bits[15:8] of starting register address for Group 7)
EEPROM Buffer Segment Register 8 (default: Bits[15:8] of starting register address for Group 3)
EEPROM Buffer Segment Register 12 (default: Bits[7:0] of starting register address for Group 4)
EEPROM Buffer Segment Register 15 (default: Bits[7:0] of starting register address for Group 5)
EEPROM Buffer Segment Register 18 (default: Bits[7:0] of starting register address for Group 6)
EEPROM Buffer Segment Register 21 (default: Bits[7:0] of starting register address for Group 7)
EEPROM Buffer Segment Register 6 (default: Bits[7:0] of starting register address for Group 2)
EEPROM Buffer Segment Register 9 (default: Bits[7:0] of starting register address for Group 3)
Bit 6
EEPROM Buffer Segment Register 22 (default: IO_UPDATE from EEPROM)
EEPROM Buffer Segment Register 23 (default: end of data)
EEPROM Buffer Segment Register 10 (default: number of bytes for Group 4)
EEPROM Buffer Segment Register 13 (default: number of bytes for Group 5)
EEPROM Buffer Segment Register 16 (default: number of bytes for Group 6)
EEPROM Buffer Segment Register 19 (default: number of bytes for Group 7)
EEPROM Buffer Segment Register 7 (default: number of bytes for Group 3)
Bit 5
Rev. 0 | Page 65 of 84
Bit 4
Unused
Bit 3
Bit 2
Bit 1
Bit 0 (LSB)
AD9520-2
Default
Value
(Hex)
04
0E
00
10
0E
00
F0
0B
01
90
01
01
E0
01
02
30
80
FF
00