ADUM5401CRWZ Analog Devices Inc, ADUM5401CRWZ Datasheet - Page 4

• Manufacturer Part Number: ADUM5401CRWZ
• Description: IC,Digital Coupler,SOP,16PIN,PLASTIC
• Manufacturer: Analog Devices Inc
• Series: IsoPower®, iCoupler®r

Specifications of ADUM5401CRWZ

• Design Resources: Fully Isolated Input Module Based on AD7793 and ADuM5401(CN0066) Fully Isolated Input Module Based on AD7793, ADuM5401, and a High Performance In-Amp (CN0067)
• Inputs - Side 1/side 2: 3/1
• Number Of Channels: 4
• Isolation Rating: 2500Vrms
• Voltage - Supply: 3.3V, 5V
• Data Rate: 25Mbps
• Propagation Delay: 45ns
• Output Type: Logic
• Package / Case: 16-SOIC (0.300", 7.5mm Width)
• Operating Temperature: -40°C ~ 105°C
• Operating Temperature (min): -40C
• Operating Temperature Classification: Industrial
• Operating Temperature (max): 105C
• Package Type: SOIC W
• Rad Hardened: No
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: EVAL-ADUM540XEBZ - BOARD EVAL FOR ADUM540x
• Lead Free Status / Rohs Status: Compliant

ADuM5401/ADuM5402/ADuM5403/ADuM5404
Parameter
iCOUPLER DATA CHANNELS
AC SPECIFICATIONS
1
2
3
4
The contributions of supply current values for all four channels are combined at identical data rates.
The V
proportional to the data rate. Additional supply current associated with an individual channel operating at a given data rate can be calculated as described in the
Power Consumption
The power demands of the quiescent operation of the data channels cannot be separated from the power supply section. Efficiency includes the quiescent power
consumed by the I/O channels as part of the internal power consumption.
This current is available for driving external loads at the V
representing the maximum dynamic load conditions. Refer to the Power C
ARWZ Grade Only
CRWZ Grade Only
For All Models
I/O Input Currents
Logic High Input Threshold
Logic Low Input Threshold
Logic High Output Voltages
Logic Low Output Voltages
Minimum Pulse Width
Minimum Pulse Width
Propagation Delay Skew
Channel-to-Channel Matching,
Channel-to-Channel Matching,
Output Rise/Fall Time (10% to 90%)
Common-Mode Transient
Common-Mode Transient
Refresh Rate
Maximum Data Rate
Propagation Delay
Pulse Width Distortion, |t
Propagation Delay Skew
Channel-to-Channel Matching
Maximum Data Rate
Propagation Delay
Pulse Width Distortion, |t
ISO
Change vs. Temperature
Codirectional Channels
Opposing Directional Channels
Immunity at Logic High Output
Immunity at Logic Low Output
supply current is available for external use when all data rates are below 2 Mbps. At data rates above 2 Mbps, the data I/O channels draw additional current
section. The dynamic I/O channel load must be treated as an external load and included in the V
PLH
PLH
− t
− t
PHL
PHL
|
|
Symbol
I
I
V
V
RC
V
V
RC
V
V
PW
t
PWD
t
t
PW
t
PWD
t
t
t
t
|CM
|CM
f
IA
IC
r
PHL
PSK
PSKCD
PHL
PSK
PSKCD
PSKOD
R
IH
IL
OAH
OCH
OAL
OCL
/t
, I
, I
OUT
OUT
, t
, t
F
IB
ID
, V
H
L
, V
, V
, V
ISO
,
|
/t
|
PLH
PLH
,
,
OBL
ODL
ODH
OBH
PSKOD
pin. All channels are simultaneously driven at a maximum data rate of 25 Mbps with full capacitive load
,
,
Min
−20
0.7 × V
0.7 × V
V
V
V
V
1
25
25
25
DD1
ISO
DD1
ISO
Rev. A | Page 4 of 24
− 0.3
− 0.5
− 0.3,
− 0.5,
onsumption
ISO
IDD1
,
Typ
5.0
4.8
0.0
0.0
55
45
5
2.5
35
35
1.0
+0.01
section for calculation of available current at less than the maximum data rate.
Max
+20
0.3 × V
0.3 × V
0.1
0.4
1000
100
40
50
50
40
60
6
15
6
15
ISO
IDD1
,
Unit
μA
V
V
V
V
V
V
ns
Mbps
ns
ns
ns
ns
ns
Mbps
ns
ns
ps/°C
ns
ns
ns
ns
kV/μs
kV/μs
Mbps
ISO
power budget.
Test Conditions/Comments
I
I
I
I
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
V
transient magnitude = 800 V
V
transient magnitude = 800 V
Ox
Ox
Ox
Ox
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
Ix
Ix
= 15 pF, CMOS signal levels
= 15 pF, CMOS signal levels
= 15 pF, CMOS signal levels
= 15 pF, CMOS signal levels
= 15 pF, CMOS signal levels
= 15 pF, CMOS signal levels
= 15 pF, CMOS signal levels
= 15 pF, CMOS signal levels
= 15 pF, CMOS signal levels
= 15 pF, CMOS signal levels
= 15 pF, CMOS signal levels
= 15 pF, CMOS signal levels
= 15 pF, CMOS signal levels
= 15 pF, CMOS signal levels
= 15 pF, CMOS signal levels
= −20 μA, V
= −4 mA, V
= 20 μA, V
= 4 mA, V
= V
= 0 V, V
DD
or V
CM
Ix
ISO
= 1000 V,
Ix
Ix
= V
Ix
= V
, V
= V
= V
CM
IxL
IxL
IxH
IxH
= 1000 V,