ADV7180KCP32Z-RL Analog Devices Inc, ADV7180KCP32Z-RL Datasheet - Page 111

• Manufacturer Part Number: ADV7180KCP32Z-RL
• Description: 10-bit 4x Oversampling SDTV Decoder
• Manufacturer: Analog Devices Inc
• Type: Video Decoderr

Specifications of ADV7180KCP32Z-RL

• Design Resources: Low Cost Differential Video Receiver Using ADA4851 Amplifier and ADV7180 Video Decoder (CN0060) Low Cost Video Multiplexer for Video Switching Using ADA4853-2 Op Amp with Disable Function (CN0076)
• Applications: Digital Cameras, Mobile Phones, Portable Video
• Voltage - Supply, Analog: 1.71 V ~ 1.89 V
• Voltage - Supply, Digital: 1.65 V ~ 2 V
• Mounting Type: Surface Mount
• Package / Case: 32-LFCSP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

ANALOG_INPUT_1
ANALOG_INPUT_2
ANALOG_INPUT_3
ANALOG_INPUT_4
ANALOG_INPUT_5
ANALOG_INPUT_6
CVBS
YC_Y
YC_C
Cb
Cr
Y
TIE LOW: I
TIE HI: I
36Ω
36Ω
36Ω
36Ω
36Ω
36Ω
KEEP VREFN AND VREFP CAPACITORS AS CLOSE AS
POSSIBLE TO THE ADV7180 AND ON THE SAME
SIDE OF THE PCB AS THE ADV7180.
2
2
NC = NO CONNECT
D
C ADDRESS = 42
C ADDRESS = 40
VDDIO
39Ω
39Ω
39Ω
39Ω
39Ω
39Ω
0.1µF
0.1µF
0.1µF
0.1µF
0.1µF
0.1µF
_3.3V
4kΩ
28.63636MHz
0.1µF
POWER_DOWN
A
A
A
A
A
A
0.1µF
47pF
47pF
IN
IN
IN
IN
IN
IN
1
2
3
4
5
6
D
RESET
VDDIO
SCLK
THE SUGGESTED INPUT ARRANGEMENT
IS AS SEEN ON THE EVAL BOARD AND IS
DIRECTLY SUPPORTED BY INSEL.
SDA
A
A
A
A
A
A
_3.3V
0.1µF
IN
IN
IN
IN
IN
IN
10nF
1
2
3
4
5
6
Figure 57. 64-Lead LQFP Typical Connection Diagram
1MΩ
33Ω
33Ω
0.1µF
0.1µF
D
D
VDD
VDDIO
_1.8V
35
36
46
47
48
49
39
38
22
21
51
29
52
54
53
_3.3V
10nF
PWRDWN
SCLK
SDATA
Rev. F | Page 111 of 116
A
A
A
A
A
A
VREFN
VREFP
XTAL
XTAL1
RESET
ALSB
IN
IN
IN
IN
IN
IN
1
2
3
4
5
6
10nF
ADV7180BSTZ
LQFP–64
INTRQ
FIELD
GPO3
GPO2
GPO1
GPO0
ELPF
0.1µF
LLC
SFL
P10
P11
P12
P13
P14
P15
NC
VS
HS
P0
P1
P2
P3
P4
P5
P6
P7
P8
P9
0.1µF
26
25
19
18
17
16
15
14
8
7
6
5
62
61
60
59
1
55
56
12
13
63
64
2
9
27, 28, 33,
41, 42, 44,
45, 50
30
20
P
D
VDD
VDD
_1.8V
KEEP CLOSE TO THE ADV7180 AND ON
THE SAME SIDE OF PCB AS THE ADV7180.
_1.8V
10nF
P0
P1
P2
P3
P4
P5
P6
P7
10nF
INT
GPO3
GPO2
GPO1
GPO0
EXTERNAL
LOOP FILTER
FIELD
VSYNC
HS
SFL
LLC
P10
P11
P12
P13
P14
P15
P[0:7]
P8
P9
1.69kΩ
10nF
0.1µF
DATA BUS
P[8:15]
P[0:7]
A
P[8:15]
VDD
_1.8V
10nF
OUTPUT MODE
656/601 YCbCr
82nF
P
VDD
8-BIT
N/A
_1.8V
ADV7180
OUTPUT MODE
16-BIT
CbCr
Y