ADV7180KCP32Z-RL Analog Devices Inc, ADV7180KCP32Z-RL Datasheet - Page 93

• Manufacturer Part Number: ADV7180KCP32Z-RL
• Description: 10-bit 4x Oversampling SDTV Decoder
• Manufacturer: Analog Devices Inc
• Type: Video Decoderr

Specifications of ADV7180KCP32Z-RL

• Design Resources: Low Cost Differential Video Receiver Using ADA4851 Amplifier and ADV7180 Video Decoder (CN0060) Low Cost Video Multiplexer for Video Switching Using ADA4853-2 Op Amp with Disable Function (CN0076)
• Applications: Digital Cameras, Mobile Phones, Portable Video
• Voltage - Supply, Analog: 1.71 V ~ 1.89 V
• Voltage - Supply, Digital: 1.65 V ~ 2 V
• Mounting Type: Surface Mount
• Package / Case: 32-LFCSP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Subaddress
0x59
0x8F
0x99
0x9A
0x9B
0x9C
0x9D
0xB2
0xC3
Register
General-
purpose
outputs
Free-Run Line
Length 1
CCAP1
(read only)
CCAP2
(read only)
Letterbox 1
(read only)
Letterbox 2
(read only)
Letterbox 3
(read only)
CRC enable
(write only)
ADC Switch 1
Bit Description
GPO[3:0]; LQFP only
GPO_ENABLE
Reserved
Reserved
LLC_PAD_SEL[2:0]; enables
manual selection of the
clock for the LLC pin
Reserved
CCAP1[7:0]; closed
caption data register
CCAP2[7:0]; closed
caption data register
LB_LCT[7:0]; letterbox
data register
LB_LCM[7:0]; letterbox
data register
LB_LCB[7:0]; letterbox
data register
Reserved
CRC_ENABLE; enable CRC
checksum decoded from
FMS packet to validate
CGMSD
Reserved
MUX0[2:0]; manual
muxing control for MUX0;
this setting controls which
input is routed to the ADC
for processing
Reserved
MUX1[2:0]; manual
muxing control for MUX1;
this setting controls which
input is routed to the ADC
for processing
Reserved
7
0
0
x
x
x
x
x
0
0
(Shading Indicates Default State)
6
0
0
1
x
x
x
x
x
0
0
0
0
0
1
1
1
1
Rev. F | Page 93 of 116
5
0
0
0
x
x
x
x
x
0
0
0
1
1
0
0
1
1
4
0
1
0
1
x
x
x
x
x
1
0
1
0
1
0
1
0
1
Bits
3
0
1
0
x
x
x
x
x
1
0
2
0
1
0
x
x
x
x
x
0
1
0
0
0
0
1
1
1
1
1
0
1
0
x
x
x
x
x
0
0
0
1
1
0
0
1
1
0
0
1
0
x
x
x
x
x
0
0
1
0
1
0
1
0
1
Comments
Outputs 0 to GPO0
Outputs 1 to GPO0
Outputs 0 to GPO1
Outputs 1 to GPO1
Outputs 0 to GPO2
Outputs 1 to GPO2
Outputs 0 to GPO3
Outputs 1 to GPO3
GPO[3:0] three-stated
GPO[3:0] enabled
Set to default
LLC (nominal 27 MHz) selected out
on LLC pin
LLC (nominal 13.5 MHz) selected out
on LLC pin
CCAP1[7] contains parity bit for Byte 0
CCAP2[7] contains parity bit for Byte 0
Reports the number of black lines
detected at the top of active video
Reports the number of black lines
detected in the bottom half of active
video if subtitles are detected
Reports the number of black lines
detected at the bottom of active video
Set as default
Turn off CRC check
CGMSD goes high with valid checksum
Set as default
LQFP
No connect
A
A
A
A
A
A
No connect
LQFP
No connect
No connect
No connect
A
A
A
A
No connect
Set to default
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
1
2
3
4
5
6
3
4
5
6
LFCSP
No connect
A
No connect
No connect
A
A
No connect
No connect
LFCSP
No connect
No connect
No connect
No connect
A
A
No connect
No connect
IN
IN
IN
IN
IN
1
2
3
2
3
Notes
GPO_ENABLE
must be set to 1
for these bits to
take effect
For 16-bit 4:2:2 out,
OF_SEL[3:0] = 0010
This feature
examines the active
video at the start
and end of each
field; it enables
format detection
even if the video is
not accompanied
by a CGMS or WSS
sequence
MAN_MUX_EN = 1
MAN_MUX_EN = 1
ADV7180