CS43L21-CNZR Cirrus Logic Inc, CS43L21-CNZR Datasheet - Page 6

• Manufacturer Part Number: CS43L21-CNZR
• Description: IC 98dB 96kHz Low Power Stereo DAC
• Manufacturer: Cirrus Logic Inc

Specifications of CS43L21-CNZR

• Number Of Bits: 24
• Data Interface: Serial
• Number Of Converters: 2
• Voltage Supply Source: Analog and Digital
• Operating Temperature: -10°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 32-QFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 598-1282 - BOARD EVAL FOR CS43L21 DAC
• Power Dissipation (max): -
• Settling Time: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

6
1. PIN DESCRIPTIONS - SOFTWARE (HARDWARE) MODE
LRCK
SDA/CDIN
(MCLKDIV2)
SCL/CCLK
(I²S/LJ)
AD0/CS
(DEM)
VA_HP
FLYP
GND_HP
FLYN
VSS_HP
Pin Name
#
1
2
3
4
5
6
7
8
9
SDA/CDIN (MCLKDIV2)
Left Right Clock (Input/Output) - Determines which channel, Left or Right, is currently active on the
serial audio data line.
Serial Control Data (Input/Output) - SDA is a data I/O in I²C Mode. CDIN is the input data line for the
control port interface in SPI Mode.
MCLK Divide by 2 (Input) - Hardware Mode: Divides the MCLK by 2 prior to all internal circuitry.
Serial Control Port Clock (Input) - Serial clock for the serial control port.
Interface Format Selection (Input) - Hardware Mode: Selects between I²S & Left-Justified interface for-
mats for the DAC.
Address Bit 0 (I²C) / Control Port Chip Select (SPI) (Input) - AD0 is a chip address pin in I²C Mode; CS
is the chip-select signal for SPI format.
De-Emphasis (Input) - Hardware Mode: Enables/disables the de-emphasis filter.
Analog Power For Headphone (Input) - Positive power for the internal analog headphone section.
Charge Pump Cap Positive Node (Input) - Positive node for the external charge pump capacitor.
Analog Ground (Input) - Ground reference for the internal headphone/charge pump section.
Charge Pump Cap Negative Node (Input) - Negative node for the external charge pump capacitor.
Negative Voltage From Charge Pump (Output) - Negative voltage rail for the internal analog head-
phone section.
SCL/CCLK (I²S/LJ)
ADO/CS (DEM)
GND_HP
VA_HP
LRCK
FLYN
FLYP
1
2
3
4
5
6
7
8
32
9
10
31
CS43L21
11
30
12
29
Pin Description
13
28
14
27
15
26
25
16
24
23
22
21
20
19
18
17
TSTO
TSTO
TSTO
TSTO
TSTO
TSTO
TSTO
TSTO
CS43L21
DS723A1