CS4412A-CNZR Cirrus Logic Inc, CS4412A-CNZR Datasheet - Page 15

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CS4412A-CNZR

Manufacturer Part Number
CS4412A-CNZR
Description
IC,Audio Amplifier,QUAD,LLCC,48PIN,PLASTIC
Manufacturer
Cirrus Logic Inc
Series
Popguard®r
Type
Class Dr
Datasheet

Specifications of CS4412A-CNZR

Output Type
2-Channel (Stereo) or 4-Channel (Quad)
Max Output Power X Channels @ Load
30W x 1 @ 4 Ohm; 15W x 2 @ 8 Ohm
Voltage - Supply
8 V ~ 18 V
Features
Depop, Short-Circuit and Thermal Protection, Standby
Mounting Type
Surface Mount
Package / Case
48-QFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
598-1581 - REFERENCE DESIGN FOR CS4412A
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
DS786A2
4.3
Output Mode Configuration
Each OUTx pin will switch in association with the corresponding INx pin. For most configurations, OUTx will
be non-inverted from INx; however, some INx pins can be configured for internal inversion to allow one
PWM input to drive both the positive and negative sides of a full-bridge output. Unused OUTx pins must
have their corresponding INx pin tied to ground.
Table 3
should remain static during operation (RST12 or RST34 set high).
In Stereo Half-Bridge and Mono Full-Bridge configurations, the PWM Popguard Transient Control only af-
fects the two half-bridge outputs, OUT1 and OUT2. The full-bridge output will not ramp regardless of the
state of the RAMP pin. See
trol.
CNFG2 CNFG1 CNFG0
* PWM Popguard Transient Control only affects OUT1 and OUT2.
0
0
0
0
1
1
1
1
shows the setting of the CNFG[2:0] inputs and the corresponding mode of operation. These pins
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
& Mono Full-Bridge
& Mono Full-Bridge
Mono Parallel Full-
Mono Parallel Full-
Stereo Half-Bridge
Stereo Half-Bridge
Stereo Full-Bridge
Stereo Full-Bridge
Section 4.2.1 on page 13
Quad Half-Bridge
Bridge Tied Load
Bridge Tied Load
With Inversion*
With Inversion
With Inversion
Description
Tied Loads*
Tied Loads
Tied Loads
Tied Loads
Tied Loads
Reserved
Table 3. Output Mode Configuration Options
IN1 must provide the PWM data for the first full-bridge.
IN2 must be inverted from IN1 for full-bridge operation.
IN3 must provide the PWM data for the second full-bridge.
IN4 must be inverted from IN3 for full-bridge operation.
IN1 must provide the PWM data for the first half-bridge.
IN2 must provide the PWM data for the second half-bridge.
IN3 must provide the PWM data for the mono full-bridge.
IN4 must be inverted from IN3 for full-bridge operation.
IN1 must provide the PWM data for the mono full-bridge.
IN2 must be wired directly to IN1 for parallel full-bridge operation.
IN3 must be inverted from IN1 for parallel full-bridge operation.
IN4 must be wired to IN3 for parallel full-bridge operation.
IN1 must provide the PWM data for the first half-bridge.
IN2 must provide the PWM data for the second half-bridge.
IN3 must provide the PWM data for the third half-bridge.
IN4 must provide the PWM data for the fourth half-bridge.
IN1 must provide the PWM data for the first full-bridge.
IN2 must be wired to IN1; the CS4412A will internally invert IN2.
IN3 must provide the PWM data for the second full-bridge.
IN4 must be wired to IN3; the CS4412A will internally invert IN4.
IN1 must provide the PWM data for the first half-bridge.
IN2 must provide the PWM data for the second half-bridge.
IN3 must provide the PWM data for the mono full-bridge.
IN4 must be wired to IN3; the CS4412A will internally invert IN4.
IN1 must be provided for half-bridge operation.
IN2 must be wired to IN1 for parallel full-bridge operation.
IN3 must be wired to IN1; the CS4412A will internally invert IN3.
IN4 must be wired to IN1; the CS4412A will internally invert IN4.
The input connections are not applicable.
for more details about PWM Popguard Transient Con-
Necessary Input Connections
CS4412A
15

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