CY62136EV30LL-45ZSXIT Cypress Semiconductor Corp, CY62136EV30LL-45ZSXIT Datasheet - Page 8

CY62136EV30LL-45ZSXIT

CY62136EV30LL-45ZSXIT

Manufacturer Part Number
CY62136EV30LL-45ZSXIT
Description
CY62136EV30LL-45ZSXIT
Manufacturer
Cypress Semiconductor Corp
Datasheet

Specifications of CY62136EV30LL-45ZSXIT

Format - Memory
RAM
Memory Type
SRAM
Memory Size
2M (128K x 16)
Speed
45ns
Interface
Parallel
Voltage - Supply
2.2 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TSOP II
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Switching Waveforms
Document #: 38-05569 Rev. *D
Notes
24. The internal write time of the memory is defined by the overlap of WE, CE = V
25. Data I/O is high impedance if OE = V
26. If CE goes HIGH simultaneously with WE = V
27. During this period, the I/Os are in output state and input signals should not be applied.
ADDRESS
DATA I/O
these signals can terminate a write by going INACTIVE. The data input setup and hold timing should be referenced to the edge of the signal that terminates the
write.
ADDRESS
DATA I/O
BHE/BLE
BHE/BLE
CE
WE
OE
OE
WE
CE
NOTE 27
NOTE
27
(continued)
IH
.
t
SA
t
t
HZOE
HZOE
Figure 4. Write Cycle No. 1: WE Controlled
Figure 5. Write Cycle No. 2: CE Controlled
IH
, the output remains in a high impedance state.
t
SA
t
AW
t
AW
t
SCE
t
WC
t
WC
IL
, BHE and BLE = V
t
t
BW
BW
DATA
DATA
t
t
PWE
t
t
SD
PWE
SD
t
IN
IN
SCE
IL
. All signals must be ACTIVE to initiate a write and any of
[24, 25, 26]
[24, 25, 26]
CY62136EV30 MoBL
t
HA
t
HA
t
t
HD
HD
Page 8 of 15
®
[+] Feedback

Related parts for CY62136EV30LL-45ZSXIT