DSPIC33EP256MU806-I/PT Microchip Technology, DSPIC33EP256MU806-I/PT Datasheet - Page 415

• Manufacturer Part Number: DSPIC33EP256MU806-I/PT
• Description: 64 PINS, 256KB Flash, 28KB RAM, 60 MHz, USB, 2xCAN, 15 DMA 64 TQFP 10x10x1mm TRA
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33EPr

Specifications of DSPIC33EP256MU806-I/PT

• Embedded Interface Type: I2C, SPI, UART
• No. Of I/o's: 51
• Flash Memory Size: 280KB
• Supply Voltage Range: 3V To 3.6V
• Operating Temperature Range: -40°C To +85°C
• Digital Ic Case Style: TQFP
• No. Of Pins: 64
• Rohs Compliant: Yes
• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 60 MIPs
• Connectivity: CAN, I²C, IrDA, LIN, QEI, SPI, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 51
• Program Memory Size: 256KB (85.5K x 24)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 12K x 16
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 24x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TQFP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

REGISTER 26-1:
 2009-2011 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15
bit 14
bit 13
bit 12
bit 11
bit 10
bit 9-8
Note 1:
RTCEN
Note:
R/W-0
R/W-0
dsPIC33EPXXXMU806/810/814 and PIC24EPXXXGU810/814
2:
(1)
A write to the RTCEN bit is only allowed when RTCWREN = 1.
This bit is read-only. It is cleared when the lower half of the MINSEC register is written.
The RCFGCAL register is only affected by a POR.
RTCEN: RTCC Enable bit
1 = RTCC module is enabled
0 = RTCC module is disabled
Unimplemented: Read as ‘0’
RTCWREN: RTCC Value Registers Write Enable bit
1 = RTCVAL register can be written to by the user application
0 = RTCVAL register is locked out from being written to by the user application
RTCSYNC: RTCC Value Registers Read Synchronization bit
1 = A rollover is about to occur in 32 clock edges (approximately 1 ms)
0 = A rollover will not occur
HALFSEC: Half-Second Status bit
1 = Second half period of a second
0 = First half period of a second
RTCOE: RTCC Output Enable bit
1 = RTCC output is enabled
0 = RTCC output is disabled
RTCPTR<1:0>: RTCC Value Register Pointer bits
Points to the corresponding RTCC Value register when reading the RTCVAL register; the
RTCPTR<1:0> value decrements on every access of the RTCVAL register until it reaches ‘00’.
R/W-0
U-0
—
RCFGCAL: RTCC CALIBRATION AND CONFIGURATION
REGISTER
W = Writable bit
‘1’ = Bit is set
RTCWREN
R/W-0
R/W-0
(1)
RTCSYNC
R/W-0
R-0
Preliminary
(2)
CAL<7:0>
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
HALFSEC
R/W-0
R-0
(2)
RTCOE
R/W-0
R/W-0
x = Bit is unknown
R/W-0
R/W-0
RTCPTR<1:0>
DS70616E-page 415
R/W-0
R/W-0
bit 8
bit 0