EVAL-AD5516-1EBZ Analog Devices Inc, EVAL-AD5516-1EBZ Datasheet - Page 10

• Manufacturer Part Number: EVAL-AD5516-1EBZ
• Description: Evaluation Board I.c.
• Manufacturer: Analog Devices Inc

Specifications of EVAL-AD5516-1EBZ

• Number Of Dac's: 16
• Number Of Bits: 14
• Outputs And Type: 16, Single Ended
• Sampling Rate (per Second): 750k
• Data Interface: Serial
• Settling Time: 32µs
• Dac Type: Voltage
• Voltage Supply Source: Analog and Digital
• Operating Temperature: -40°C ~ 85°C
• Utilized Ic / Part: AD5516-1
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

AD5516
FUNCTIONAL DESCRIPTION
The AD5516 consists of sixteen 12-bit DACs in a single pack-
age. A single reference input pin (REF_IN) is used to provide a
3 V reference for all 16 DACs. To update a DAC’s output
voltage, the required DAC is addressed via the 3-wire serial
interface. Once the serial write is complete, the selected DAC
converts the code into an output voltage. The output amplifiers
translate the DAC output range to give the appropriate voltage
range (± 2.5 V, ± 5 V, or ± 10 V) at output pins V
The AD5516 uses a self-calibrating architecture to achieve 12-bit
performance. The calibration routine servos to select the appro-
priate voltage level on an internal 14-bit resolution DAC. BUSY
output goes low for the duration of the calibration and further
writes to the AD5516 are ignored while BUSY is low. BUSY low
time is typically 25 ms. Noise during the calibration (BUSY
low period) can result in the selection of a voltage within a
±0.25 LSB band around the normal selected voltage. See TPC 10.
It is essential to minimize noise on REFIN for optimal perfor-
mance. The AD780’s specified decoupling makes it the ideal
reference to drive the AD5516.
Upon power-on, all DACs power up to a reset value (see the
RESET section).
DIGITAL-TO-ANALOG SECTION
The architecture of each DAC channel consists of a resistor
string DAC followed by an output buffer amplifier with offset
and gain. The voltage at the REF_IN pin provides the reference
voltage for all 16 DACs. The input coding to the DACs is offset
binary; this results in ideal output voltages as follows:
AD5516-1:
AD5516-2:
AD5516-3:
V
V
V
OUT
OUT
OUT
=
=
=
MSB
MSB
MSB
2
4
8
0
0
1
MODE
MODE
MODE
BITS
¥
BITS
BITS
¥
¥
V
V
V
REF IN
REF IN
REF IN
0
1
0
3 2
3 2
3 2
_
_
_
¥
¥
¥
A3
A3
A3
¥
¥
¥
N
N
N
2 5
2 5
2 5
ADDRESS
ADDRESS
ADDRESS
A2
A2
A2
.
.
.
BITS
BITS
BITS
¥
¥
¥
D V
D
D
A1
A1
A1
–
–
–
2
4
A0
A0
A0
OUT
REF IN
V
V
REF IN
REF IN
Figure 4. Mode 1 Data Format
Figure 5. Mode 2 Data Format
_
0 to V
DB11 DB10 DB9
DB11 DB10 DB9
DB11 DB10 DB9
3
_
_
3
3
¥
¥
2 5
¥
OUT
.
2 5
2 5
.
.
15.
–10–
DB8
DB8
DB8
Where:
D = decimal equivalent of the binary code that is loaded to
N = DAC resolution = 12
Table I illustrates ideal analog output versus DAC code.
MODES OF OPERATION
The AD5516 has two modes of operation.
Mode 1 (MODE bits = 00): The user programs a 12-bit data-
word to one of 16 channels via the serial interface. This word is
loaded into the addressed DAC register and is then converted
into an analog output voltage. During conversion, the BUSY
output is low and all SCLK pulses are ignored. At the end of a
conversion BUSY goes high, indicating that the update of the
addressed DAC is complete. It is recommended that SCLK is not
pulsed while BUSY is low. Mode 1 conversion takes 25 ms typ.
Mode 2 (MODE bits = 01 or 10): Mode 2 operation allows the
user to increment or decrement the DAC output in 0.25 LSB steps,
resulting in a 14-bit monotonic DAC. The amount by which the
DAC output is incremented or decremented is determined by
Mode 2 bits DB11–DB0, e.g., for a 0.25 LSB increment/decrement
DB11...DB0 = 0000 0000 0001, while for a 2.5 LSB increment/
decrement, DB11...DB0 = 0000 0000 1010. The MODE bits
determine whether the DAC data is incremented (01) or dec-
remented (10). The maximum amount that the user is allowed
to increment or decrement the DAC output is 4095 steps of
0.25 LSB, i.e., DB11...DB0 = 1111 1111 1111. Mode 2 update
takes approximately 1 ms. The Mode 2 feature allows increased
resolution, but overall increment/decrement accuracy varies with
increment/decrement step as shown in TPC 14 and TPC 15.
Mode 2 is useful in applications where greater resolution is
required, for example, in servo applications requiring fine-tune
to 14-bit resolution.
DB7
DB7
DB7
the DAC register, i.e., 0–4095
MSB
1111 1111 1111
1000 0000 0000
0000 0000 0000
DB6
DB6
DB6
Table I. DAC Register Contents AD5516-1
DATA
BITS
DB5
DB5
DB5
LSB
DB4
DB4
DB4
12 DECREMENT
12 INCREMENT
DB3
BITS
BITS
DB3
DB3
DB2
DB2
DB2
Analog Output, V
V
0 V
–V
REF_IN
REF_IN
DB1
DB1
DB1
¥ 2.5/3 – 1 LSB
¥ 2.5/3
DB0
LSB
DB0
DB0
LSB
LSB
OUT
REV. B