AD9861BCP-80 Analog Devices Inc, AD9861BCP-80 Datasheet - Page 44

• Manufacturer Part Number: AD9861BCP-80
• Description: IC FRONT-END MIXED SGNL 64-LFCSP
• Manufacturer: Analog Devices Inc

Specifications of AD9861BCP-80

• Rohs Status: RoHS non-compliant
• Rf Type: WLL, WLAN
• Features: 10-bit ADC(s), 10-bit DAC(s)
• Package / Case: 64-VFQFN, CSP Exposed Pad

AD9861
Read Operation
The readback of registers can be a single or dual data byte
operation. The readback can be configured to use 3-wire or
4-wire and can be formatted with MSB first or LSB first. The
instruction header is written to the device either MSB or LSB
first (depending on the mode) followed by the 8-bit output data
(appropriately MSB or LSB justified). By default, the output data
is sent to the dedicated output pin (SDO). Three-wire operation
SCLK
SCLK
SCLK
SDIO
SDIO
SDIO
SDO
SDO
SEN
SEN
SEN
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DON'T CARE
Figure 82. 1-Byte Serial Register Readback in MSB First Mode, SDIO BiDir Bit Set Logic High (Default, 3-Wire Mode)
Figure 81. 1-Byte Serial Register Readback In MSB First Mode, SDIO BiDir Bit Set Logic Low (Default, 4-Wire Mode)
Figure 83. 1-Byte Serial Register Readback in LSB First Mode, SDIO BiDir Bit Set Logic Low (Default, 4-Wire Mode)
t
t
t
S
S
S
R/W
R/W
A0
t
t
t
DS
DS
DS
t
2/1
t
2/1
A1
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t
DON'T CARE
DH
DH
DH
A5
A5
A2
INSTRUCTION HEADER
INSTRUCTION HEADER
INSTRUCTION HEADER
A4
A4
t
t
A3
t
HI
HI
HI
t
t
t
LO
LO
LO
A3
A3
A4
A2
A2
A5
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A1
A1
2/1
t
t
CLK
CLK
t
CLK
A0
A0
R/W
D7
D7
D0
can be configured by setting the SDIO BiDir register. In 3-wire
mode, the SDIO pin becomes an output pin after receiving the
8-bit instruction header with a readback request.
Figure 81 shows a 4-wire SPI read with MSB first; Figure 82
shows a 3-wire read with MSB first; and Figure 83 shows a
4-wire read with LSB first.
t
t
DV
DV
t
DV
D6
D6
D1
OUTPUT REGISTER DATA
OUTPUT REGISTER DATA
D5
D5
OUTPUT REGISTER DATA
D2
D4
D4
D3
D3
D3
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D4
DON'T CARE
D2
D2
D5
D1
D1
D6
D0
D0
D7
t
t
H
H
t
H
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DON'T CARE
03606-0-025
03606-0-026
03606-0-027