WM8903LGEFK/V Wolfson Microelectronics, WM8903LGEFK/V Datasheet - Page 86

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WM8903LGEFK/V

Manufacturer Part Number
WM8903LGEFK/V
Description
Audio CODECs ULTRA LOW PWR HI FI CODEC
Manufacturer
Wolfson Microelectronics
Datasheet

Specifications of WM8903LGEFK/V

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
WM8903
w
The companded data is also inverted as recommended by the G.711 standard (all 8 bits are inverted
for μ-law, all even data bits are inverted for A-law). Companded data is transmitted in the first
8 MSBs of its respective data word, and consists of sign (1 bit), exponent (3 bits) and mantissa (4
bits), as shown in Table 56.
Table 56 8-bit Companded Word Composition
8-bit mode is selected whenever DAC_COMP=1 or ADC_COMP=1. The use of 8-bit data allows
samples to be passed using as few as 8 BCLK cycles per LRC frame. When using DSP mode B, 8-
bit data words may be transferred consecutively every 8 BCLK cycles.
8-bit mode (without Companding) may be enabled by setting DAC_COMPMODE=1 or
ADC_COMPMODE=1, when DAC_COMP=0 and ADC_COMP=0.
LOOPBACK
A loopback function is provided for test and evaluation purposes. When the LOOPBACK register bit
is set, the output data from the ADC is fed directly into the DAC input.
Table 57 Loopback Control
Note: When the digital sidetone is enabled, ADC data will continue to be added to DAC data when
loopback is enabled.
SIGN
R24 (18h)
Audio
Interface 0
BIT7
REGISTER
ADDRESS
BIT
EXPONENT
8
BIT[6:4]
LOOPBACK
LABEL
DEFAULT
0
Digital Loopback Function
0 = No loopback
1 = Loopback enabled (ADC data
output is directly input to DAC data
input)
MANTISSA
BIT[3:0]
PP, Rev 3.1, August 2009
DESCRIPTION
Pre-Production
86

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