CS495303-CVZR Cirrus Logic Inc, CS495303-CVZR Datasheet - Page 14

Audio DSPs IC 32-bit Decodr DSP w/Dual DSP Engine

CS495303-CVZR

Manufacturer Part Number
CS495303-CVZR
Description
Audio DSPs IC 32-bit Decodr DSP w/Dual DSP Engine
Manufacturer
Cirrus Logic Inc
Datasheets

Specifications of CS495303-CVZR

Operating Temperature Range
0 C to + 70 C
Mounting Style
SMD/SMT
Package / Case
LQFP-128
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
CS4953xx Data Sheet
32-bit Audio Decoder DSP Family
5.10 Switching Characteristics — Serial Control Port - SPI Slave Mode
14
SCP_CLK frequency
SCP_CS falling to SCP_CLK rising
SCP_CLK low time
SCP_CLK high time
Setup time SCP_MOSI input
Hold time SCP_MOSI input
SCP_CLK low to SCP_MISO output valid
SCP_CLK falling to SCP_IRQ rising
SCP_CS rising to SCP_IRQ falling
SCP_CLK low to SCP_CS rising
SCP_CS rising to SCP_MISO output high-Z
SCP_CLK rising to SCP_BSY falling
SCP_MOSI
SCP_MISO
SCP_CS
SCP_CLK
SCP_BSY
1. The specification f
SCP_IRQ
the actual maximum speed of the communication port may be limited by the firmware application. Flow control using
the SCP_BSY pin should be implemented to prevent overflow of the input data buffer. At boot the maximum speed
is F
xtal
/3.
Parameter
1
spisck
f
spisck
t
spicss
indicates the maximum speed of the hardware. The system designer should be aware that
A6
t
spidsu
0
Figure 3. Serial Control Port - SPI Slave Mode Timing
A5
t
1
spidh
Copyright 2009 Cirrus Logic
2
t
spickh
t
spickl
Symbol
t
t
t
f
t
t
t
t
t
spicbsyl
t
spicsdz
t
t
spickh
spidsu
spidov
spiirqh
spicsh
spisck
spicss
spiirql
spickl
spidh
A0
6
t
spidov
R/W
7
Min
24
20
20
24
5
5
0
-
-
-
-
-
MSB
MSB
0
3
*
DCLKP+20
5
Typical
20
t
spiirqh
6
LSB
LSB
.
7
t
spibsyl
Max
25
11
20
-
-
-
-
-
-
t
spicsh
DS705PP6
t
spicsdz
Units
t
MHz
spiirql
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

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