CS8415A-IZZR Cirrus Logic Inc, CS8415A-IZZR Datasheet - Page 8

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CS8415A-IZZR

Manufacturer Part Number
CS8415A-IZZR
Description
Audio DSPs 96 kHz Digital Audio Intrfc Receiver
Manufacturer
Cirrus Logic Inc
Datasheet

Specifications of CS8415A-IZZR

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
8
SWITCHING CHARACTERISTICS - SERIAL AUDIO PORTS
Inputs: Logic 0 = 0 V, Logic 1 = VL+; C
OSCLK Active Edge to SDOUT Output Valid
Master Mode
RMCK to OSCLK active edge delay
RMCK to OLRCK delay
OSCLK and OLRCK Duty Cycle
Slave Mode
OSCLK Period
OSCLK Input Low Width
OSCLK Input High Width
OSCLK Active Edge to OLRCK Edge
OLRCK Edge Setup Before OSCLK Active Edge
O S C L K
(o u tp u t)
O L R C K
(o u tp u t)
(o u tp u t)
(o u tp u t)
R M C K
R M C K
Figure 1. Audio Port Master Mode Timing
7. The active edges of OSCLK are programmable.
8. The polarity OLRCK is programmable.
9. No more than 128 SCLK per frame.
10. This delay is to prevent the previous OSCLK edge from being interpreted as the first one after OLRCK
11. This setup time ensures that this OSCLK edge is interpreted as the first one after OLRCK has changed.
has changed.
H a rd w a re M o d e
S o ftw a re M o d e
t sm d
Parameter
t
lm d
L
= 20 pF.
Notes 7
(Note
OSCLK
OLRCK
(input)
SDOUT
(input)
(Note 7)
(Note 7)
(Note 8)
(Note 9)
7
,
,
8
8
,
,
10
11
Figure 2. Audio Port Slave Mode and Data Input Timing
)
t
Symbol
lrckd
t
t
t
t
t
t
t
t
sckw
sckh
lrckd
lrcks
smd
sckl
dpd
lmd
t
lrcks
Min
36
14
14
20
20
0
0
-
-
t
sckh
Typ
50
-
-
-
-
-
-
-
-
t
sckw
Max
t
20
10
10
sckl
-
-
-
-
-
-
t dpd
CS8415A
DS470F4
Units
ns
ns
ns
ns
ns
ns
ns
ns
%

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