CS495313-CQZR Cirrus Logic Inc, CS495313-CQZR Datasheet - Page 15

Audio DSPs IC 32-bit Decodr DSP w/Dual DSP Engine

CS495313-CQZR

Manufacturer Part Number
CS495313-CQZR
Description
Audio DSPs IC 32-bit Decodr DSP w/Dual DSP Engine
Manufacturer
Cirrus Logic Inc
Datasheets

Specifications of CS495313-CQZR

Operating Temperature Range
0 C to + 70 C
Mounting Style
SMD/SMT
Package / Case
LQFP-144
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
5.11 Switching Characteristics — Serial Control Port - SPI Master Mode
DS705PP5
SCP_CLK frequency
SCP_CS falling to SCP_CLK rising
SCP_CLK low time
SCP_CLK high time
Setup time SCP_MISO input
Hold time SCP_MISO input
SCP_CLK low to SCP_MOSI output valid
SCP_CLK low to SCP_CS falling
SCP_CLK low to SCP_CS rising
Bus free time between active SCP_CS
SCP_CLK falling to SCP_MOSI output high-Z
SCP_MISO
SCP_MOSI
SCP_CLK
1. The specification f
2. See
3. SCP_CLK PERIOD refers to the period of SCP_CLK as being used in a given application. It does not refer to a
.
EE_CS
the actual maximum speed of the communication port may be limited by the firmware application.
tested parameter
Section
t
spicsl
5.8.
Parameter
1
f
spisck
spisck
t
spicss
indicates the maximum speed of the hardware. The system designer should be aware that
A6
t
spidsu
0
Figure 4. Serial Control Port - SPI Master Mode Timing
3
A5
t
1
spidh
Copyright 2009 Cirrus Logic
2
t
spickh
t
spickl
Symbol
A0
t
t
t
t
f
t
t
t
t
t
t
6
spickh
spidsu
spidov
spicsh
spisck
spicss
spicsx
spickl
spicsl
spidh
spidz
t
spidov
R/W
7
Min
18
18
11
5
7
-
-
-
-
-
MSB
MSB
0
(SCP_CLK PERIOD)/2
(SCP_CLK PERIOD)/2
5
11*DCLKP +
11*DCLKP +
3*DCLKP
Typical
6
32-bit Audio Decoder DSP Family
LSB
LSB
7
CS4953xx Data Sheet
F
t
Max
spidz
xtal
20
11
t
t
spicsx
-
-
-
-
-
-
-
-
spicsh
/2
2
Units
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
15

Related parts for CS495313-CQZR