CS495313-CQZR Cirrus Logic Inc, CS495313-CQZR Datasheet - Page 22

Audio DSPs IC 32-bit Decodr DSP w/Dual DSP Engine

CS495313-CQZR

Manufacturer Part Number
CS495313-CQZR
Description
Audio DSPs IC 32-bit Decodr DSP w/Dual DSP Engine
Manufacturer
Cirrus Logic Inc
Datasheets

Specifications of CS495313-CQZR

Operating Temperature Range
0 C to + 70 C
Mounting Style
SMD/SMT
Package / Case
LQFP-144
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
CS4953xx Data Sheet
32-bit Audio Decoder DSP Family
5.16 Switching Characteristics — UART
22
UART_CLK period
UART_CLK duty cycle
Setup time for UART_RXD
Hold time for UART_RXD
Delay from CLK transition to TXD transition
Delay from TXEN to TXD driven with valid data
Delay from TXEN to TXD driven to high-Z state
1. The minimum clock period is limited to DCLKP/32 or the minimum value, whichever is larger.
1
Parameter
UART_TX_EN
UART_RXD
UART_TXD
UART_CLK
Copyright 2009 Cirrus Logic
Figure 11. UART Timing
t
uckrxsu
t
ucktxdv
t
txen
t
uckrxdv
Symbol
t
t
t
uckrxsu
uckrxdv
ucktxdv
t
t
t
uclki
txen
txhz
-
t
txhz
TBD
Min
266
40
5
5
-
-
Max
TBD
TBD
60
29
-
-
-
DS705PP5
Unit
ns
ns
ns
ns
ns
%

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