DS1077Z-125 Maxim Integrated Products, DS1077Z-125 Datasheet - Page 17

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DS1077Z-125

Manufacturer Part Number
DS1077Z-125
Description
Timers & Support Products EconOscillator-Divid onOscillator-Divider
Manufacturer
Maxim Integrated Products
Datasheet
8) A fast mode device can be used in a standard mode system, but the requirement t
9) C
10) OUT0 and OUT1 are operating at oscillator master frequency without divider.
11) Typical frequency shift due to aging is ±0.5%. Aging stressing includes Level 3 preconditioning with
TIMING DIAGRAM
SDA
ORDERING INFORMATION
Example:
DS1077Z-100
SCL
be met. This will automatically be the case if the device does not stretch the LOW period of the SCL
signal. If such a device does stretch the LOW period of the SCL signal, it must output the next data bit to
the SDA line t
1000 temperature cycles of -55°C to +125°C, 336hr max V
preconditioning consists of a 24hr +125°C storage bake, 192hr moisture soak at +30°C/60% R.H., and
three solder reflow passes.
STOP
B
is the total capacitance of one bus line in pF.
t
BUF
START
DS1077
t
R MAX
HD:STA
t
LOW
+ t
SU
t
R
:
t
DAT
HD:DAT
= 1000ns + 250ns = 1250ns before the SCL line is released.
t
HIGH
t
F
t
SU:DAT
17 of 21
t
SU:STA
REPEATED
133 = 133.333MHz
125 = 125.000MHz
120 = 120.000MHz
100 = 100.000MHz
START
Z =
U =
66 =
t
HD:STA
66.666MHz
SO
µSOP
CC
biased +125°C bake. Level 3
SU
:
DAT
t
SP
>250ns must then
t
SU:STO

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