CS8900A-CQ3 Cirrus Logic Inc, CS8900A-CQ3 Datasheet - Page 87

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CS8900A-CQ3

Manufacturer Part Number
CS8900A-CQ3
Description
Ethernet ICs IC 10Mbps Ethernet Controller 3.3V
Manufacturer
Cirrus Logic Inc
Datasheet

Specifications of CS8900A-CQ3

Ethernet Connection Type
10Base- 2, 10Base- 5, 10Base- F, 10Base- T
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Product
Ethernet Controllers
Standard Supported
IEEE 802.3
Data Rate
10 Mbps
Maximum Operating Temperature
+ 70 C
Package / Case
LQFP-100
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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0
DS271F5
register can be read to determine the final
frame status.
The sequence is as follows:
1) At the start of a frame, the byte counter
2) At the end of the frame, the final count, in-
3) When a read of the byte counter returns a
4) RxEvent should be read to obtain a final
Note that all RxEvent's should be processed
before using the byte counter. The byte coun-
ter should be used following a BufEvent when
RxDest or Rx128 interrupts are enabled.
5.2.10 Receive Frame Address Filtering
The CS8900A is equipped with a Destination
Address (DA) filter used to determine which
receive frames will be accepted. (A receive
frame is said to be "accepted" by the CS8900A
when the frame data are placed in either on-
chip memory, or in host memory by DMA). The
DA filter can be configured to accept the fol-
lowing frame types:
5.2.10.1 Individual Address Frames
For all Individual Address frames, the first bit of
the DA is a "0" (DA[0] = 0), indicating that the
address is a Physical Address. The address
filter accepts Individual Address frames whose
DA matches the Individual Address (IA) stored
at PacketPage base + 0158h, or whose hash-
filtered DA matches one of the bits pro-
CS8900A
Crystal LAN™ Ethernet Controller
matches the incoming character counter.
The byte counter will have an even value
prior to the end of the frame.
cluding the allowance for the CRC (if the
BufferCRC option is enabled), is held until
the byte counter is read.
count of zero, the previous count was the fi-
nal count. The count may now have an odd
value.
status of the frame, followed by a Skip
command to complete the operation.
CIRRUS LOGIC PRODUCT DATASHEET
grammed into the Logical Address Filter (the
hash filter is described later in this section).
5.2.10.2 Multicast Frames
For Multicast Frames, the first bit of the DA is
a "1" (DA[0] = 1), indicating that the frame is a
Logical Address. The address filter accepts
Multicast frames whose hash-filtered DA
matches one of the bits programmed into the
Logical Address Filter (the hash filter is de-
scribed later is this section). As shown in Table
26, Broadcast Frames can be accepted as
Multicast frames under a very specific set of
conditions.
5.2.10.3 Broadcast Frames
Frames with DA equal to FFFF FFFF FFFFh
are broadcast frames. In addition, the
CS8900A can be configured for Promiscuous
Mode, in which case it will accept all receive
frames, irrespective of DA.
5.2.11 Configuring the Destination
Address Filter
The DA filter is configured by programming
five DA filter bits in the RxCTL register (Regis-
ter 5): IAHashA, PromiscuousA, MulticastA,
IndividualA, and BroadcastA. Four of these
bits are associated with four status bits in the
RxEvent
Hashed, IndividualAdr, and Broadcast. The
RxEvent register reports the results of the DA
filter for a given receive frame. The bits asso-
ciated with DA filtering are summarized below:
Bit #
A
B
6
7
9
PromiscuousA
BroadcastA
Register 5
IndividualA
MulticastA
IAHashA
register
RxCTL
(Register
(used only if BroadcastA = 1)
(used only if IndividualA = 1)
(used only if IAHashA = 1)
IndividualAdr
Register 4
Broadcast
RxEvent
Hashed
IAHash
4):
IAHash,
87

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