89HPES16T4AG2ZCALG Integrated Device Technology (Idt), 89HPES16T4AG2ZCALG Datasheet

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89HPES16T4AG2ZCALG

Manufacturer Part Number
89HPES16T4AG2ZCALG
Description
PCI Express Switch 324-Pin FCBGA Tray
Manufacturer
Integrated Device Technology (Idt)
Datasheet
1.IDT89HPES16T4AG2ZBAL8.pdf (30 pages)

Specifications of 89HPES16T4AG2ZCALG

Package
324FCBGA
Operating Temperature
0 to 70 °C
Device Overview
PCI Express® switching solutions. The PES16T4AG2 is a 16-lane, 4-
port Gen2 peripheral chip that performs PCI Express Base switching
with a feature set optimized for high performance applications such as
servers, storage, and communications/networking. It provides connec-
tivity and switching functions between a PCI Express upstream port and
up to three downstream ports and supports switching between down-
stream ports.
Features
Block Diagram
© 2010 Integrated Device Technology, Inc.
The 89HPES16T4AG2 is a member of IDT’s PRECISE™ family of
◆
– Sixteen 5 Gbps Gen2 PCI Express lanes
– Four switch ports
– Low latency cut-through switch architecture
– Support for Max Payload Size up to 2048 bytes
– One virtual channel
– Eight traffic classes
– PCI Express Base Specification Revision 2.0 compliant
High Performance PCI Express Switch
• One x8 or x4 upstream port
• Up to three x4 downstream ports
Multiplexer / Demultiplexer
Transaction Layer
Data Link Layer
(Port 0)
SerDes
Logical
Layer
Phy
Frame Buffer
IDT and the IDT logo are registered trademarks of Integrated Device Technology, Inc.
®
16-Lane 4-Port
Gen2 PCI Express® Switch
Multiplexer / Demultiplexer
Transaction Layer
4-Port Switch Core / 16 PCI Express Lanes
Data Link Layer
(Port 1)
SerDes
Logical
Layer
Phy
Route Table
Figure 1 Internal Block Diagram
1 of 30
Multiplexer / Demultiplexer
◆
◆
◆
◆
Arbitration
– Automatic per port link width negotiation to x8, x4, x2 or x1
– Automatic lane reversal on all ports
– Automatic polarity inversion
– Ability to load device configuration from serial EEPROM
– PCI compatible INTx emulation
– Bus locking
– Incorporates on-chip internal memory for packet buffering and
– Integrates sixteen 5 Gbps embedded SerDes with 8b/10b
– Internal end-to-end parity protection on all TLPs ensures data
– Supports ECRC and Advanced Error Reporting
– Supports PCI Express Native Hot-Plug, Hot-Swap capable I/O
– Compatible with Hot-Plug I/O expanders used on PC mother-
– Supports Hot-Swap
Transaction Layer
Flexible Architecture with Numerous Configuration Options
Legacy Support
Highly Integrated Solution
Reliability, Availability, and Serviceability (RAS) Features
Data Link Layer
Port
• Receive equalization (RxEQ)
queueing
encoder/decoder (no separate transceivers needed)
integrity even in systems that do not implement end-to-end
CRC (ECRC)
boards
(Port 2)
SerDes
Logical
Layer
Phy
Scheduler
Multiplexer / Demultiplexer
89HPES16T4AG2
Transaction Layer
Data Link Layer
(Port 3)
SerDes
September 13, 2010
Logical
Layer
Phy
Data Sheet
DSC 6928

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89HPES16T4AG2ZCALG Summary of contents

Page 1

Device Overview The 89HPES16T4AG2 is a member of IDT’s PRECISE™ family of PCI Express® switching solutions. The PES16T4AG2 is a 16-lane, 4- port Gen2 peripheral chip that performs PCI Express Base switching with a feature set optimized for high ...

Page 2

IDT 89HPES16T4AG2 Data Sheet ◆ Power Management – Utilizes advanced low-power design techniques to achieve low typical power consumption – Support PCI Express Power Management Interface specifica- tion (PCI-PM 2.0) – Unused SerDes are disabled. – Supports Advanced Configuration and ...

Page 3

IDT 89HPES16T4AG2 Data Sheet Processor SMBus PES16T4AG2 Master SSMBCLK SSMBDAT MSMBCLK MSMBDAT (a) Unified Configuration and Management Bus Hot-Plug Interface The PES16T4AG2 supports PCI Express Hot-Plug on each downstream port. To reduce the number of pins required on the device, ...

Page 4

IDT 89HPES16T4AG2 Data Sheet Pin Description The following tables list the functions of the pins provided on the PES16T4AG2. Some of the functions listed may be multiplexed onto the same pin. The active polarity of a signal is defined using ...

Page 5

IDT 89HPES16T4AG2 Data Sheet Signal GPIO[0] GPIO[1] GPIO[2] GPIO[7] GPIO[8] GPIO[9] GPIO[10] Type Name/Description I/O General Purpose I/O. This pin can be configured as a general purpose I/O pin. Alternate function pin name: P2RSTN Alternate function pin type: Output Alternate ...

Page 6

IDT 89HPES16T4AG2 Data Sheet Signal CCLKDS CCLKUS P01MERGEN P23MERGEN PERSTN SWMODE[2:0] Signal JTAG_TCK JTAG_TDI Type Name/Description I Common Clock Downstream. The assertion of this pin indicates that all downstream ports are using the same clock source as that provided to ...

Page 7

IDT 89HPES16T4AG2 Data Sheet Signal JTAG_TDO JTAG_TMS JTAG_TRST_N Signal REFRES0 REFRES1 REFRES2 REFRES3 V CORE PEA DD V PEHA DD V PETA Type Name/Description O JTAG Data Output. This is the serial ...

Page 8

IDT 89HPES16T4AG2 Data Sheet Pin Characteristics Note: Some input pads of the PES16T4AG2 do not contain internal pull-ups or pull-downs. Unused inputs should be tied off to appropriate levels. This is especially critical for unused control signal inputs which, if ...

Page 9

IDT 89HPES16T4AG2 Data Sheet Function SerDes Reference REFRES0 Resistors REFRES1 REFRES2 REFRES3 1. Internal resistor values under typical operating conditions are 92K Ω for pull-up and 90K Ω for pull-down. 2. All receiver pins set the DC common mode voltage ...

Page 10

IDT 89HPES16T4AG2 Data Sheet Logic Diagram — PES16T4AG2 Reference Clocks PCI Express Switch SerDes Input Port 0 PCI Express Switch SerDes Input Port 1 PCI Express Switch SerDes Input Port 2 PCI Express Switch SerDes Input Port 3 Master SMBus ...

Page 11

IDT 89HPES16T4AG2 Data Sheet System Clock Parameters Values based on systems running at recommended supply voltages and operating temperatures, as shown in Tables 12 and 14. Parameter Description Refclk Input reference clock frequency range FREQ T Rising edge rate C-RISE ...

Page 12

IDT 89HPES16T4AG2 Data Sheet Parameter T Maximum time to transition to a valid Idle after sending TX-IDLE-SET-TO-IDLE an Idle ordered set T Maximum time to transition from valid idle to diff data TX-IDLE-TO-DIFF- DATA T Transmitter data skew between any ...

Page 13

IDT 89HPES16T4AG2 Data Sheet Signal JTAG JTAG_TCK 1 JTAG_TMS , JTAG_TDI JTAG_TDO JTAG_TRST_N 1. The JTAG specification, IEEE 1149.1, recommends that JTAG_TMS should be held at 1 while the signal applied at JTAG_TRST_N changes from Otherwise, a ...

Page 14

IDT 89HPES16T4AG2 Data Sheet Recommended Operating Supply Voltages Symbol V CORE Internal logic supply DD V I/O I/O supply except for SerDes LVPECL/CML PEA PCI Express Analog Power PEHA PCI Express Analog High Power ...

Page 15

IDT 89HPES16T4AG2 Data Sheet Power Consumption Typical power is measured under the following conditions: 25°C Ambient, 35% total link usage on all ports, typical voltages defined in Table 12 (and also listed below). Maximum power is measured under the following ...

Page 16

IDT 89HPES16T4AG2 Data Sheet DC Electrical Characteristics Values based on systems running at recommended supply voltages, as shown in Table 12. Note: See Table 7, Pin Characteristics, for a complete I/O listing. I/O Type Parameter Description Serial Link PCIe Transmit ...

Page 17

IDT 89HPES16T4AG2 Data Sheet I/O Type Parameter Description Serial Link PCIe Receive (cont.) V Differential input voltage (peak-to- RX-DIFFp-p peak) RL Receiver Differential Return Loss RX-DIFF RL Receiver Common Mode Return RX-CM Loss Z Differential input impedance (DC) RX-DIFF-DC Z ...

Page 18

IDT 89HPES16T4AG2 Data Sheet Package Pinout — 324-BGA Signal Pinout for PES16T4AG2 The following table lists the pin numbers and signal names for the PES16T4AG2 device. Pin Function Alt Pin A1 V B17 I/O B18 DD A3 ...

Page 19

IDT 89HPES16T4AG2 Data Sheet Pin Function Alt Pin H11 V K13 SS H12 V PEA K14 DD H13 V PEA K15 DD H14 NC K16 H15 NC K17 H16 V K18 SS H17 NC L1 H18 PE2TP02 ...

Page 20

IDT 89HPES16T4AG2 Data Sheet Pin Function Alt Pin U1 V U10 SS U2 PEREFCLKN U11 U3 V U12 SS U4 PE1TN03 U13 U5 PE1TN02 U14 U6 REFRES1 U15 U7 PE1TN01 U16 U8 PE1TN00 U17 U9 V U18 SS Alternate Signal ...

Page 21

IDT 89HPES16T4AG2 Data Sheet Power Pins V Core V Core G10 D14 G14 D15 G15 H10 E10 J8 E11 J10 E12 K4 E13 F10 K10 G4 K14 ...

Page 22

IDT 89HPES16T4AG2 Data Sheet Ground Pins A11 A15 A16 B3 B16 C3 C6 C16 D16 D17 D18 G17 M16 E3 G18 E16 ...

Page 23

IDT 89HPES16T4AG2 Data Sheet Signals Listed Alphabetically Signal Name CCLKDS CCLKUS GPIO_00 GPIO_01 GPIO_02 GPIO_07 GPIO_08 GPIO_09 GPIO_10 JTAG_TCK JTAG_TDI JTAG_TDO JTAG_TMS JTAG_TRST_N MSMBCLK MSMBDAT NO CONNECTION P01MERGEN P23MERGEN PE0RN00 PE0RN01 PE0RN02 PE0RN03 PE0RP00 PE0RP01 PE0RP02 PE0RP03 PE0TN00 PE0TN01 PE0TN02 ...

Page 24

IDT 89HPES16T4AG2 Data Sheet Signal Name PE0TP03 PE1RN00 PE1RN01 PE1RN02 PE1RN03 PE1RP00 PE1RP01 PE1RP02 PE1RP03 PE1TN00 PE1TN01 PE1TN02 PE1TN03 PE1TP00 PE1TP01 PE1TP02 PE1TP03 PE2RN00 PE2RN01 PE2RN02 PE2RN03 PE2RP00 PE2RP01 PE2RP02 PE2RP03 PE2TN00 PE2TN01 PE2TN02 PE2TN03 PE2TP00 PE2TP01 PE2TP02 PE2TP03 PE3RN00 ...

Page 25

IDT 89HPES16T4AG2 Data Sheet Signal Name PE3RN03 PE3RP00 PE3RP01 PE3RP02 PE3RP03 PE3TN00 PE3TN01 PE3TN02 PE3TN03 PE3TP00 PE3TP01 PE3TP02 PE3TP03 PEREFCLKN PEREFCLKP PERSTN REFRES0 REFRES1 REFRES2 REFRES3 SSMBCLK SSMBDAT SWMODE_0 SWMODE_1 SWMODE_2 V CORE PEA, V PEHA, ...

Page 26

IDT 89HPES16T4AG2 Data Sheet PES16T4AG2 Pinout — Top View Core (Power I/O (Power) ...

Page 27

IDT 89HPES16T4AG2 Data Sheet PES16T4AG2 Package Drawing — 324-Pin AL324/AR324 September 13, 2010 ...

Page 28

IDT 89HPES16T4AG2 Data Sheet PES16T4AG2 Package Drawing — Page Two September 13, 2010 ...

Page 29

IDT 89HPES16T4AG2 Data Sheet Revision History January 15, 2009: Publication of final data sheet. February 11, 2009: Revised AC Timing Characteristics table and DC Electrical Characteristics table to correct typos. March 6, 2009: Added industrial temperature. April 7, 2009: In ...

Page 30

... Voltage Detail Valid Combinations 89HPES16T4AG2ZCAL 324-ball FCBGA package, Commercial Temperature 89HPES16T4AG2ZCALG 324-ball Green FCBGA package, Commercial Temperature 89HPES16T4AG2ZCALI 324-ball FCBGA package, Industrial Temperature 89HPES16T4AG2ZCALGI 324-ball Green FCBGA package, Industrial Temperature CORPORATE HEADQUARTERS 6024 Silver Creek Valley Road San Jose, CA 95138 ® ...

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