CY37064P100-125AXI Cypress Semiconductor Corp, CY37064P100-125AXI Datasheet - Page 28

CPLD Ultra37000™ Family 2K Gates 64 Macro Cells 125MHz CMOS Technology 5V 100-Pin TQFP

CY37064P100-125AXI

Manufacturer Part Number
CY37064P100-125AXI
Description
CPLD Ultra37000™ Family 2K Gates 64 Macro Cells 125MHz CMOS Technology 5V 100-Pin TQFP
Manufacturer
Cypress Semiconductor Corp
Series
Ultra37000™r

Specifications of CY37064P100-125AXI

Package
100TQFP
Family Name
Ultra37000™
Device System Gates
2000
Number Of Macro Cells
64
Maximum Propagation Delay Time
10 ns
Number Of User I/os
69
Number Of Logic Blocks/elements
4
Typical Operating Supply Voltage
5 V
Maximum Operating Frequency
125 MHz
Number Of Product Terms Per Macro
16
Operating Temperature
-40 to 85 °C
Programmable Type
In-System Reprogrammable™ (ISR™) Flash
Delay Time Tpd(1) Max
10.0ns
Voltage Supply - Internal
4.5 V ~ 5.5 V
Number Of Macrocells
64
Number Of I /o
69
Mounting Type
Surface Mount
Package / Case
100-LQFP
Voltage
5V
Memory Type
CMOS
# Macrocells
64
Number Of Usable Gates
2000
Frequency (max)
125MHz
Propagation Delay Time
10ns
# I/os (max)
69
Operating Supply Voltage (typ)
5V
In System Programmable
Yes
Operating Supply Voltage (min)
4.5V
Operating Supply Voltage (max)
5.5V
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
100
Package Type
TQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Number Of Logic Elements/cells
-
Lead Free Status / Rohs Status
Compliant
Other names
428-1936
CY37064P100-125AXI

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CY37064P100-125AXI
Manufacturer:
CY
Quantity:
5 510
Part Number:
CY37064P100-125AXI
Manufacturer:
Cypress Semiconductor Corp
Quantity:
10 000
Part Number:
CY37064P100-125AXI
Manufacturer:
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Quantity:
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Part Number:
CY37064P100-125AXIT
Manufacturer:
Cypress Semiconductor Corp
Quantity:
10 000
Part Number:
CY37064P100-125AXIT
Manufacturer:
CYP
Quantity:
1 040
Document #: 38-03007 Rev. *E
Typical 3.3V Power Consumption (continued)
CY37064V
CY37128V
8 0
7 0
6 0
5 0
4 0
3 0
2 0
1 0
4 5
4 0
3 5
3 0
2 5
2 0
1 5
1 0
0
5
0
0
0
The typical pattern is a 16-bit up counter, per logic block, with outputs disabled.
The typical pattern is a 16-bit up counter, per logic block, with outputs disabled.
2 0
2 0
4 0
4 0
V
V
CC
CC
= 3.3V, T
= 3.3V, T
6 0
F re q u e n c y (M H z )
6 0
F r e q u e n c y (M H z )
A
A
= Room Temperature
= Room Temperature
L o w P o w e r
L o w P o w e r
8 0
8 0
1 0 0
1 0 0
Ultra37000 CPLD Family
1 2 0
1 2 0
H ig h S p e e d
H ig h S p e e d
1 4 0
1 4 0
Page 28 of 64

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