XC2C512-10FT256C Xilinx Inc, XC2C512-10FT256C Datasheet
XC2C512-10FT256C
Specifications of XC2C512-10FT256C
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XC2C512-10FT256C Summary of contents
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... Xilinx, Inc. All rights reserved. All Xilinx trademarks, registered trademarks, patents, and disclaimers are as listed at http://www.xilinx.com/legal.htm. All other trademarks and registered trademarks are the property of their respective owners. All specifications are subject to change without notice. DS096 (v3.2) March 8, 2007 Product Specification 0 XC2C512 CoolRunner-II CPLD Product Specification 0 0 Description The CoolRunner-II 512-macrocell device is designed for both high performance and low power applications ...
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... LVCMOS standard is used in 3.3V, 2.5V, 1.8V applications. Both HSTL and SSTL I/O standards make use for JEDEC compliance. CoolRunner-II CPLDs are also 1.5V I/O compatible with the use of Schmitt-trigger inputs. Table 1). This Table 1: I/O Standards for XC2C512 IOSTANDARD Attribute LVTTL LVCMOS33 LVCMOS25 ...
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... CC CCIO MHz MHz MHz MHz MHz 3.9V IN CCIO 3.9V IN CCIO www.xilinx.com XC2C512 CoolRunner-II CPLD Value Units –0.5 to 2.0 –0.5 to 4.0 -0.5 to 4.0 -0.5 to 4.0 –0.5 to 4.0 –0.5 to 4.0 –65 to +150 °C +150 °C Min Max 1.7 1.9 1.7 1.9 3.0 3 ...
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... XC2C512 CoolRunner-II CPLD LVCMOS 3.3V and LVTTL 3.3V DC Voltage Specifications Symbol Parameter V Input source voltage CCIO V High level input voltage IH V Low level input voltage IL V High level output voltage OH V Low level output voltage OL LVCMOS 2.5V DC Voltage Specifications Symbol Parameter ...
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... CCIO REF of receiving devices REF Test Conditions –8 mA CCIO mA CCIO , also peak to peak AC noise on V CCIO REF of receiving devices REF www.xilinx.com XC2C512 CoolRunner-II CPLD Min. Max. V – 0.45 - CCIO = 1.4V V – 0.2 - CCIO - 0.4 - 0.2 Min. Max. 1.4 3 CCIO CCIO 0 ...
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... XC2C512 CoolRunner-II CPLD HSTL1 DC Voltage Specifications Symbol Parameter V Input source voltage CCIO (1) V Input reference voltage REF (2) V Termination voltage TT V High level input voltage IH V Low level input voltage IL V High level output voltage OH V Low level output voltage OL Notes: 1 ...
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... F EXT1 SU1 CO 4. Typical configuration current during T DS096 (v3.2) March 8, 2007 Product Specification Parameter is through the OR array. is approximately 15mA CONFIG www.xilinx.com XC2C512 CoolRunner-II CPLD -7 -10 Min. Max. Min. Max. - 7.1 - 9 ...
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... XC2C512 CoolRunner-II CPLD Internal Timing Parameters Symbol Parameter Buffer Delays T Input buffer delay IN T Direct data register input delay DIN T Global Clock buffer delay GCK T Global set/reset buffer delay GSR T Global 3-state buffer delay GTS T Output buffer delay OUT T Output buffer enable/disable delay ...
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... GTS - OUT , DIN GCK GSR GTS - OUT , DIN GCK GSR GTS - OUT AC Test Circuit DS096_02_022003 PD www.xilinx.com XC2C512 CoolRunner-II CPLD -7 -10 Max. Min. Max. 0.6 - 1.0 1.5 - 3.0 0.8 - 2.0 3.0 - 4.0 0.5 - 2.0 1.2 - 3.0 1.2 - 3.0 3.0 - 4.0 0.4 - 1.0 -0 ...
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... The I/V curve illustrates the nominal amount of current that an I/O can source/sink at different voltage levels 3.3V 2.5V 1.8V 1.5V .5 1.0 1.5 2.0 VO (Output Volts) Figure 4: Typical I/V Curves for XC2C512 www.xilinx.com I OL 2.5 3.0 3.5 XC512VoIo_all022003 DS096 (v3.2) March 8, 2007 Product Specification R ...
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... PQ208 FT256 1(GTS0 1(GTS3 1(GTS2 208 B4 1(GSR) 16 206 2(GTS1 DS096 (v3.2) March 8, 2007 Product Specification Pin Descriptions (Continued) Function I/O Block FG324 Bank www.xilinx.com XC2C512 CoolRunner-II CPLD Macro- cell PQ208 FT256 FG324 1 205 - 203 - 202 201 200 199 I/O Bank ...
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... XC2C512 CoolRunner-II CPLD Pin Descriptions (Continued) Function Macro- Block cell PQ208 FT256 5 1 198 197 196 195 194 193 192 Pin Descriptions (Continued) I/O Function FG324 Bank Block www.xilinx.com Macro- cell PQ208 FT256 FG324 1 191 - 189 188 187 186 185 A8 D10 ...
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... DS096 (v3.2) March 8, 2007 Product Specification Pin Descriptions (Continued) I/O Function FG324 Bank Block - AA2 1 11 AB1 AA1 1 11(GCK0 AB2 AB3 1 12 AA4 AA5 AB4 www.xilinx.com XC2C512 CoolRunner-II CPLD Macro- cell PQ208 FT256 FG324 AB5 AA6 AB6 AA7 AB7 I/O Bank ...
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... XC2C512 CoolRunner-II CPLD Pin Descriptions (Continued) Function Macro- Block cell PQ208 FT256 Pin Descriptions (Continued) I/O Function FG324 Bank Block - AA8 1 16 AB8 AA9 AB9 1 16 W10 Y10 1 16 www.xilinx.com Macro- cell PQ208 FT256 FG324 AA10 AB10 AB11 W11 AA11 Y11 ...
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... A22 4 20 B21 4 20 B22 4 20 C20 C21 4 20 D19 D20 4 20 C22 4 20 www.xilinx.com XC2C512 CoolRunner-II CPLD Macro- cell PQ208 FT256 FG324 1 170 D13 C17 2 171 A14 B17 3 173 E13 A17 4 - A13 D16 5 - C11 C16 A12 B16 14 - B11 A16 ...
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... XC2C512 CoolRunner-II CPLD Pin Descriptions (Continued) Function Macro- Block cell PQ208 FT256 D10 21 2 174 B10 21 3 175 E12 F12 21 5 178 149 G13 22 2 148 F15 22 3 147 G14 22 4 146 E16 145 H12 22 14 144 F16 22 15 143 H16 ...
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... U22 3 27 Y22 3 28 W21 3 28 W20 3 28 Y21 3 28 Y20 AA22 3 28 AB22 3 28 AA21 3 28 AB21 3 28 www.xilinx.com XC2C512 CoolRunner-II CPLD Macro- cell PQ208 FT256 FG324 1 118 L15 T19 2 - L13 T20 3 119 M12 T21 4 120 M16 T22 K14 R19 14 ...
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... XC2C512 CoolRunner-II CPLD Pin Descriptions (Continued) Function Macro- Block cell PQ208 FT256 L16 122 29 4 123 125 K15 L12 T12 P10 T11 R10 M10 T10 Pin Descriptions (Continued) I/O Function FG324 Bank Block P19 P20 P21 P22 N19 3 31 N21 3 31 ...
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... R XC2C512 JTAG, Power/Ground, No Connect Pins and Total User I/O Pin Type TCK TDI TDO TMS V (JTAG supply CCAUX voltage) Power internal ( Power Bank 1 I CCIO1 Power Bank 2 I CCIO2 Power Bank 3 I CCIO3 Power Bank 4 I 133, 157, 172, 181 CCIO4 ...
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... XC2C512 CoolRunner-II CPLD Ordering Information Pin/Ball Part Number Spacing XC2C512-7PQ208C 0.5mm XC2C512-10PQ208C 0.5mm XC2C512-7FT256C 1.0mm XC2C512-7FT256I 1.0mm XC2C512-10FT256C 1.0mm XC2C512-7FG324C 1.0mm XC2C512-10FG324C 1.0mm XC2C512-7PQG208C 0.5mm XC2C512-10PQG208C 0.5mm XC2C512-7FTG256C 1.0mm XC2C512-7FTG256I 1.0mm XC2C512-10FTG256C 1.0mm XC2C512-7FGG324C 1.0mm XC2C512-10FGG324C 1.0mm XC2C512-10PQ208I 0.5mm XC2C512-10FT256I 1.0mm XC2C512-10FG324I 1 ...
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... I/O 48 I/O 49 I/O 50 I/O(4) 51 GND 52 DS096 (v3.2) March 8, 2007 Product Specification PQ208 Top View Figure 6: PQ208 Plastic Quad Flat Pack www.xilinx.com XC2C512 CoolRunner-II CPLD GND 156 I/O 155 I/O 154 I/O 153 I/O 152 I/O 151 I/O 150 I/O 149 I/O ...
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... XC2C512 CoolRunner-II CPLD I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O VCC I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O ...
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... I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O FG324 Bottom View Figure 8: FG324 Fine Pitch BGA www.xilinx.com XC2C512 CoolRunner-II CPLD I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O ...
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... Corrections to timing parameters t t OUT t PHD changes to silicon or characterization. Added XC2C512-7FT256I and XC2C512-7FTG236I packages. Change to V 03/08/07 3.2 Fixed typo in note for access these and all application notes with their associ- ated reference designs, click the following link and scroll ...