XC2S100E-6TQ144C Xilinx Inc, XC2S100E-6TQ144C Datasheet - Page 95

• Manufacturer Part Number: XC2S100E-6TQ144C
• Description: FPGA Spartan®-IIE Family 100K Gates 2700 Cells 357MHz 0.15um Technology 1.8V 144-Pin TQFP
• Manufacturer: Xilinx Inc
• Series: Spartan™-IIEr

Specifications of XC2S100E-6TQ144C

• Package: 144TQFP
• Family Name: Spartan®-IIE
• Device Logic Cells: 2700
• Device Logic Units: 600
• Device System Gates: 100000
• Maximum Internal Frequency: 357 MHz
• Typical Operating Supply Voltage: 1.8 V
• Maximum Number Of User I/os: 102
• Ram Bits: 40960
• Number Of Logic Elements/cells: 2700
• Number Of Labs/clbs: 600
• Total Ram Bits: 40960
• Number Of I /o: 102
• Number Of Gates: 100000
• Voltage - Supply: 1.71 V ~ 1.89 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 144-LQFP
• Case: TQFP144
• Dc: 05+
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 122-1206

FG676 Pinouts (XC2S400E, XC2S600E) (Continued)
DS077-4 (2.3) June 18, 2008
Product Specification
I/O, L138P_YY
I/O, L137N_YY
I/O, L137P_YY
I/O
I/O, L136N
I/O, L136P
I/O
I/O, L135N_YY
I/O, L135P_YY
I/O, L134N_YY
I/O, L134P_YY
I/O
I/O, L133N
I/O, L133P
I/O
I/O, L132N_YY
I/O, L132P_YY
I/O, VREF Bank 5,
L131N_YY
I/O, L131P_YY
I/O
I/O, L130N_YY
I/O, L130P_YY
I/O
I/O, L129N
I/O, L129P
I/O, VREF Bank 5,
L128N
I/O, L128P
I/O
I/O, L127N
I/O, L127P
I/O (DLL), L126N
GCK1, I
Function
Pad Name
R
Bank
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
AB10
AC10
AD10
AE10
AD11
AA11
AB11
AE11
AA12
AB12
AC12
AE12
AA13
AB13
AC13
AD13
AE13
AF10
AF11
AF12
AF13
W11
W12
W13
W14
Y10
Y11
V12
Y12
V13
Y13
V14
Pin
Output Option
LVDS Async.
XC2S600E
XC2S600E
XC2S600E
XC2S600E
XC2S600E
XC2S600E
All
All
All
All
All
All
All
All
All
All
All
All
All
-
-
-
-
-
-
-
-
-
-
-
-
-
www.xilinx.com
Option
VREF
All
All
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
I/O, VREF Bank 5,
I/O, VREF Bank 5,
I/O (DLL), L126N
I/O, L138P_YY
I/O, L137N_YY
I/O, L137P_YY
I/O, L135N_YY
I/O, L135P_YY
I/O, L134N_YY
I/O, L134P_YY
I/O, L132N_YY
I/O, L132P_YY
I/O, L131P_YY
I/O, L130N_YY
I/O, L130P_YY
Spartan-IIE FPGA Family: Pinout Tables
XC2S400E
I/O, L136N
I/O, L133N
L131N_YY
I/O, L129N
I/O, L136P
I/O, L133P
I/O, L129P
I/O, L128P
GCK1, I
L128N
I/O
Device-Specific Pinouts
-
-
-
-
-
-
-
-
I/O, VREF Bank 5,
I/O, VREF Bank 5,
I/O (DLL), L126N
I/O, L138P_YY
I/O, L137N_YY
I/O, L137P_YY
I/O, L135N_YY
I/O, L135P_YY
I/O, L134N_YY
I/O, L134P_YY
I/O, L132N_YY
I/O, L132P_YY
I/O, L131P_YY
I/O, L130N_YY
I/O, L130P_YY
I/O, L136N_Y
I/O, L129N_Y
I/O, L136P_Y
I/O, L129P_Y
I/O, L128P_Y
XC2S600E
I/O, L133N
L131N_YY
I/O, L127N
I/O, L133P
I/O, L127P
L128N_Y
GCK1, I
I/O
I/O
I/O
I/O
I/O
I/O
I/O
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