MAX2163ETI/V+T Maxim Integrated Products, MAX2163ETI/V+T Datasheet - Page 8

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MAX2163ETI/V+T

Manufacturer Part Number
MAX2163ETI/V+T
Description
RF Receiver Low power TV tuner f or 1 segment ISDB-T
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of MAX2163ETI/V+T

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
ISDB-T 1-Segment Tuner
8
4, 8, 9, 10
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PIN
11
12
13
14
15
16
17
18
1
2
3
5
6
7
PWRDET
V
V
LEXTU
UHFIN
NAME
V
IFOUT
SHDN
V
STBY
CCBIAS
CCLNA
GC1
GC2
N.C.
SCL
SDA
CCRF
CCIF
Device Standby. Connect to logic-high to place the device in standby mode. Connect to logic-low for
normal operation. This pin is logically ORed to the STBY bit.
Device Shutdown. Connect to logic-low to place the device in shutdown mode.
Optional UHF Tracking Filter Inductor. Connect an 18nH inductor from this pin to ground.
No Connection. Connect to the PCB ground plane.
DC Power Supply for LNA. Connect to a +2.5V low-noise supply. Bypass to GND with a 0.1µF capacitor
placed as close as possible to the pin. Do not share capacitor ground vias with other ground
connections.
DC Power Supply for RF Circuits. Connect to a +2.5V low-noise supply. Bypass to GND with a 0.1µF
capacitor placed as close as possible to the pin. Do not share capacitor ground vias with other ground
connections.
UHF 50Ω RF Input. Incorporates an internal DC-blocking capacitor.
RF Gain Control Input. In closed-loop RFAGC mode (PDBM[1:0] = 11), connecting a capacitor from
GC1 to ground sets the AGC response time. In open-loop RFAGC mode (PDBM[1:0] = 10), GC1 is a
high-impedance analog input that controls the RFAGC.
DC Power Supply for IF Circuits. Connect to a +2.5V low-noise supply. Bypass to GND with a 0.1µF
capacitor placed as close as possible to the pin. Do not share capacitor ground vias with other ground
connections.
IF Gain Control Input. High-impedance analog input.
DC Power Supply for Bias Circuits. Connect to a +2.5V low-noise supply. Bypass to GND with a 0.1µF
capacitor placed as close as possible to the pin. Do not share capacitor ground vias with other ground
connections.
Low-IF Output. Requires a DC-blocking capacitor.
Low-Impedance Power Detector Output Buffer. Bits PDBM[1:0] control the function of this output pin.
See Table 6.
2-Wire Serial-Clock Interface. Requires a pullup resistor to V
2-Wire Serial-Data Interface. Requires a pullup resistor to V
DESCRIPTION
CCDIG
CCDIG
.
.
Pin Description

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