UPD4990AG Renesas Electronics America, UPD4990AG Datasheet
UPD4990AG
Specifications of UPD4990AG
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UPD4990AG Summary of contents
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To our customers, Old Company Name in Catalogs and Other Documents st On April 1 , 2010, NEC Electronics Corporation merged with Renesas Technology Corporation, and Renesas Electronics Corporation took over all the business of both companies. Therefore, although the ...
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All information included in this document is current as of the date this document is issued. Such information, however, is subject to change without any prior notice. Before purchasing or using any Renesas Electronics products listed herein, please confirm ...
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The PD4990A is a CMOS LSI developed to input/output calendar & clock data serially to/from the micro computer. The crystal frequency is 32.768 kHz and the data items included are time, minute, second, year, month, day, and week. FEATURES • ...
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ABSOLUTE MAXIMUM RATINGS Supply Voltage Input Voltage Operating Temperature Range Storage Temperature Range Output Terminal Voltage ELECTRICAL CHARACTERISTICS (f = 32.768 kHz, C CHARACTERISTIC SYMBOL Operating Voltage Current Consumption I DD Low Level Output Voltage V OL ...
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BLOCK DIAGRAM D/W -TH MON DECODER SELECTOR PD4990A DATA 3 ...
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FUNCTION SPECIFICATIONS Crystal frequency (X tal osc.). 32.768 kHz Data Data types are: second, minute, day, week, month, and year. Leap years, 31-day months, and months with 30 or less days are adjusted automatically. A 24-hour system is used and ...
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TERMINALS Input terminals DATA IN Data input of 40-/52-bit shift register CLK Shift clock input of 40-/52-bit shift register Command input (3 bit STB Strobe input CS Chip select input (Prohibits CLK ...
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COMMAND SPECIFICATIONS Commands input from and Shift register 40 bit (The year function is ineffective.) (Operates as the existing PD1990AC in other than test mode ...
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Command input (1) 3-bit binary code input (2) 4-bit serial transfer command input: C Number of commands Register control TP select TP control Test mode set Commands ( ...
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TP selection and control [ Set Mode [ [ (50 % duty) is output to the TP pin The year ...
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Interval output function An interrupt signal can be output by selecting an output from TP. Interrupt signals are output repeatedly at specified intervals until their output is suppressed by a command. Only output flags can be reset to operate the ...
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Test mode In the test mode, data is output to the DATA OUT pin regardless of whether data has been input to OUT ENBL. There are two different test modes depending on the OUT ENBL data. (1) Test mode 1 ...
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TIMING DIAGRAM FOR SETTING COMMANDS ( DATA DSU V IH CLK V IL STB Other than time read mode NEW COMMAND OLD MODE VALID Time read mode OLD MODE V ...
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TIMING DIAGRAM FOR SETTING COMMANDS (C CAN CHANGE STB CLK V IL Other than time read mode NEW COMMAND OLD MODE VALID Time read mode OLD MODE V ...
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DATA INPUT/OUTPUT TIMING DIAGRAM CLK "1" s. "10" s. DATA IN OUT ENBL "1" s. "10" s. DATA OUT 1011 Note: Reading-in timing of CPU (Trailing edge of CLK). TIMING ...
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POWER SUPPLY CIRCUIT 1SS53 2SA733 + 510 2SC945 4.7 k GND 14 PD4990A 1SS53 DIN Ni Cd CLK 3.6 V STB TAL ...
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APPLICATION + CLK RESET PD4175BC Power Supply Circuit 10 k DATA BUS WR ...
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PLASTIC DIP (300 mil NOTES 1) Each lead centerline is located within 0.25 mm (0.01 inch) of its true position (T.P.) at maximum material condition. 2) Item "K" to ...
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PIN PLASTIC SOP (300 mil NOTE Each lead centerline is located within 0.12 mm (0.005 inch) of its true position (T.P.) at maximum material condition PD4990A detail of ...
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PD4990A ...
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PD4990A 19 ...
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No part of this document may be copied or reproduced in any form or by any means without the prior written consent of NEC Corporation. NEC Corporation assumes no responsibility for any errors which may appear in this document. NEC ...