ICS1892Y-14LF IDT, Integrated Device Technology Inc, ICS1892Y-14LF Datasheet - Page 134

ICS1892Y-14LF

Manufacturer Part Number
ICS1892Y-14LF
Description
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet

Specifications of ICS1892Y-14LF

Lead Free Status / RoHS Status
Compliant
10.5.11 10M Media Independent Interface: Transmit Latency
ICS1892, Rev. D, 2/26/01
TXEN
TXCLK
TXD
TP_TX*
*Manchester
encoding not
shown.
Table 10-18
timings of signals on the following pins: TXEN, TXCLK, TXD (that is, TXD[3:0]), and TP_TX (that is, the
TP_TXP and TP_TXN pins).
Table 10-18. 10M MII Transmit Latency Timing
Figure 10-11. 10M MII Transmit Latency Timing Diagram
Period
Time
t1
ICS1892 Data Sheet
TXD Sampled to MDI Output of First Bit
lists the significant time periods for the 10M MII transmit latency. The time periods consist of
© 2000-2001, Integrated Circuit Systems, Inc.
All rights reserved.
5
Parameter
Figure 10-11
shows the timing diagram for the time periods.
t1
134
5
10M MII
Conditions
Chapter 10 DC and AC Operating Conditions
Min.
Typ.
1.2
5
Max.
February 26, 2001
2
Bit times
Units

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