1892Y-14LFT IDT, Integrated Device Technology Inc, 1892Y-14LFT Datasheet - Page 27

• Manufacturer Part Number: 1892Y-14LFT
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of 1892Y-14LFT

• Lead Free Status / RoHS Status: Compliant

6.3 10M Serial Interface
ICS1892, Rev. D, 2/26/01
When the Mac/Repeater Interface is configured as a 10M Serial Interface, the ICS1892 and the
MAC/repeater exchange a framed, serial bit stream along with associated control signals. The 10M Serial
Interface configuration is ideally suited to applications that already incorporate a serial 10Base-T MAC with
a standard ‘7-wire’ interface. The ICS1892 MAC/Repeater Interface can be configured for 10M Serial
Interface operations, as determined by ICS1892 configuration functions. When the HW/SW pin is set for:
•
•
The 10M Serial Interface has two data paths: one for data transmission and one for data reception. Each
data path exchanges a serial bit stream with the MAC/repeater at a 10-MHz clock rate. A benefit of using
the 10M Serial Interface – in contrast to the 10M MII Interface – is a reduction in the bit latency through the
ICS1892. This reduction is attributed to the elimination of both parallel-to-serial and serial-to-parallel data
conversions.
The 10M Serial Interface consists of the following nine signals: 10TCLK, 10TXEN, 10TD, 10RCLK,
10RXDV, 10RD, 10CRS, 10COL, and LSTA. (When the ICS1892 MAC/Repeater Interface is configured for
10M Serial operations, both its default MII pin names and their associated functions are redefined. For
more information, see
Note:
Hardware mode, the 10M Serial Interface is selected when the following are true:
Software mode, the 10M Serial Interface is selected when the following are true:
– The MII/SI input pin is logic one (that is, the selection is for a Serial Interface).
– The 10/100SEL input pin is logic zero (that is, the selection is for 10M operations).
– The 10/LP input pin is logic zero
– The MII/SI input pin is logic one (that is, the selection is for a Serial Interface).
– The Control Register Data Rate bit (bit 0.13) is logic zero (that is, the selection is for 10M operations).
– The 10/LP input pin is logic zero
ICS1892
In software mode, the 10/100SEL pin becomes an output that indicates the state of bit 0.13.
Section 9.2.4.3, “MAC/Repeater Interface Pins for 10M Serial
© 2000-2001, Integrated Circuit Systems, Inc.
All rights reserved.
27
Chapter 6 Interface Overviews
Interface”.)
February 26, 2001