PIC12F1822-E/P Microchip Technology, PIC12F1822-E/P Datasheet - Page 139

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PIC12F1822-E/P

Manufacturer Part Number
PIC12F1822-E/P
Description
3.5 KB Flash, 128 Bytes RAM, 32 MHz Int. Osc, 6 I/0, Enhanced Mid Range Core 8 P
Manufacturer
Microchip Technology
Series
PIC® XLP™ 12Fr
Datasheets

Specifications of PIC12F1822-E/P

Core Processor
PIC
Core Size
8-Bit
Speed
32MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
6
Program Memory Size
3.5KB (2K x 14)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
8-DIP (0.300", 7.62mm)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
16.0
The
conversion of an analog input signal to a 10-bit binary
representation of that signal. This device uses analog
inputs, which are multiplexed into a single sample and
hold circuit. The output of the sample and hold is
connected to the input of the converter. The converter
generates a 10-bit binary result via successive
approximation and stores the conversion result into the
ADC result registers (ADRESH:ADRESL register pair).
Figure 16-1
The ADC voltage reference is software selectable to be
either internally generated or externally supplied.
FIGURE 16-1:
 2010 Microchip Technology Inc.
Analog-to-Digital
ANALOG-TO-DIGITAL
CONVERTER (ADC) MODULE
Temp Indicator
Note 1: When ADON = 0, all multiplexer inputs are disconnected.
FVR Buffer1
shows the block diagram of the ADC.
2: Not available on PIC12F/LF1822.
AN4
AN5
AN6
AN7
DAC
AN0
AN1
AN2
AN3
(2)
(2)
(2)
(2)
ADC BLOCK DIAGRAM
Converter
CHS<4:0>
V
DD
PIC12F/LF1822/PIC16F/LF1823
V
(ADC)
REF
00000
00001
00010
00011
00100
00101
00110
00111
11110
11111
11101
+
ADPREF = 11
ADPREF = 00
ADPREF = 10
allows
Preliminary
GO/DONE
ADON
The ADC can generate an interrupt upon completion of
a conversion. This interrupt can be used to wake-up the
device from Sleep.
(1)
V
SS
ADC
ADFM
ADRESH ADRESL
0 = Left Justify
1 = Right Justify
DS41413B-page 139
16
10

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