PIC16LC63-04/SO Microchip Technology, PIC16LC63-04/SO Datasheet - Page 26

• Manufacturer Part Number: PIC16LC63-04/SO
• Description: IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,SOP,28PIN,PLASTIC
• Manufacturer: Microchip Technology
• Series: PIC® 16Cr

Specifications of PIC16LC63-04/SO

• Rohs Compliant: YES
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 4MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 22
• Program Memory Size: 7KB (4K x 14)
• Program Memory Type: OTP
• Ram Size: 192 x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 6 V
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 28-SOIC (7.5mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

TABLE 4-3:
00h
01h
02h
03h
04h
05h
06h
07h
08h
09h
0Ah
0Bh
0Ch
0Dh
0Eh
0Fh
10h
11h
12h
13h
14h
15h
16h
17h
18h
19h
1Ah
1Bh
1Ch
1Dh
1Eh-1Fh
Legend: x = unknown, u = unchanged, q = value depends on condition, - = unimplemented location read as '0'.
Note 1: These registers can be addressed from either bank.
Address Name
1997 Microchip Technology Inc.
Bank 0
(1)
(1)
(1)
(1)
(1,2)
(1)
2: The upper byte of the Program Counter (PC) is not directly accessible. PCLATH is a holding register for the PC whose
3: Other (non power-up) resets include external reset through MCLR and the Watchdog Timer reset.
4: The IRP and RP1 bits are reserved on the PIC16C63/R63, always maintain these bits clear.
5: PIE1<7:6> and PIR1<7:6> are reserved on the PIC16C63/R63, always maintain these bits clear.
INDF
TMR0
PCL
STATUS
FSR
PORTA
PORTB
PORTC
PCLATH
INTCON
PIR1
PIR2
TMR1L
TMR1H
T1CON
TMR2
T2CON
SSPBUF
SSPCON
CCPR1L
CCPR1H
CCP1CON
RCSTA
TXREG
RCREG
CCPR2L
CCPR2H
CCP2CON
Shaded locations are unimplemented, read as ‘0’.
contents are transferred to the upper byte of the program counter. (PC<12:8>)
—
—
—
SPECIAL FUNCTION REGISTERS FOR THE PIC16C63/R63
Addressing this location uses contents of FSR to address data memory (not a physical register)
Timer0 module’s register
Program Counter's (PC) Least Significant Byte
Indirect data memory address pointer
PORTB Data Latch when written: PORTB pins when read
PORTC Data Latch when written: PORTC pins when read
Unimplemented
Unimplemented
Holding register for the Least Significant Byte of the 16-bit TMR1 register
Holding register for the Most Significant Byte of the 16-bit TMR1 register
Timer2 module’s register
Synchronous Serial Port Receive Buffer/Transmit Register
Capture/Compare/PWM1 (LSB)
Capture/Compare/PWM1 (MSB)
USART Transmit Data Register
USART Receive Data Register
Capture/Compare/PWM2 (LSB)
Capture/Compare/PWM2 (MSB)
Unimplemented
WCOL
IRP
SPEN
Bit 7
GIE
(5)
—
—
—
—
—
—
—
(4)
TOUTPS3 TOUTPS2 TOUTPS1 TOUTPS0
SSPOV
RP1
PEIE
Bit 6
RX9
(5)
—
—
—
—
—
—
(4)
PORTA Data Latch when written: PORTA pins when read
T1CKPS1
SSPEN
CCP1X
CCP2X
SREN
RCIF
Bit 5
T0IE
RP0
—
—
Write Buffer for the upper 5 bits of the Program Counter
T1CKPS0 T1OSCEN
CCP1Y
CCP2Y
CREN
INTE
Bit 4
TXIF
CKP
—–
TO
CCP1M3
CCP2M3
SSPM3
SSPIF
RBIE
Bit 3
PD
—
—
TMR2ON
CCP1M2
CCP2M2
T1SYNC
CCP1IF
SSPM2
FERR
Bit 2
T0IF
—
Z
T2CKPS1 T2CKPS0 -000 0000 -000 0000
TMR1CS
CCP1M1
CCP2M1
TMR2IF
SSPM1
OERR
Bit 1
INTF
DC
—
TMR1ON
CCP1M0
CCP2M0
TMR1IF
CCP2IF
SSPM0
RX9D
RBIF
Bit 0
C
PIC16C6X
0000 0000 0000 0000
xxxx xxxx uuuu uuuu
0000 0000 0000 0000
0001 1xxx 000q quuu
xxxx xxxx uuuu uuuu
--xx xxxx --uu uuuu
xxxx xxxx uuuu uuuu
xxxx xxxx uuuu uuuu
---0 0000 ---0 0000
0000 000x 0000 000u
0000 0000 0000 0000
---- ---0 ---- ---0
xxxx xxxx uuuu uuuu
xxxx xxxx uuuu uuuu
--00 0000 --uu uuuu
0000 0000 0000 0000
xxxx xxxx uuuu uuuu
0000 0000 0000 0000
xxxx xxxx uuuu uuuu
xxxx xxxx uuuu uuuu
--00 0000 --00 0000
0000 -00x 0000 -00x
0000 0000 0000 0000
0000 0000 0000 0000
xxxx xxxx uuuu uuuu
xxxx xxxx uuuu uuuu
--00 0000 --00 0000
Value on:
POR,
BOR
DS30234D-page 26
—
—
—
Value on
resets
all other
—
—
—
(3)