PIC24FV16KA302-E/SP Microchip Technology, PIC24FV16KA302-E/SP Datasheet - Page 233

• Manufacturer Part Number: PIC24FV16KA302-E/SP
• Description: 16KB Flash, 2KB RAM, 512B EEPROM, 16 MIPS, 12-bit ADC, CTMU, 5V 28 SPDIP .300in
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 24Fr

Specifications of PIC24FV16KA302-E/SP

• Processor Series: PIC24FV
• Core: PIC
• Data Bus Width: 16 bit
• Program Memory Type: Flash
• Program Memory Size: 16 KB
• Data Ram Size: 2 KB
• Maximum Operating Temperature: + 125 C
• Mounting Style: Through Hole
• Package / Case: SPDIP-28
• Development Tools By Supplier: MPLAB IDE Software
• Minimum Operating Temperature: - 40 C
• Core Processor: PIC
• Core Size: 16-Bit
• Speed: 32MHz
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 23
• Eeprom Size: 512 x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 13x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Lead Free Status / Rohs Status: Details

25.2
Time measurements on the pulse width can be similarly
performed using the A/D module’s internal capacitor
(C
Figure 25-2
time measurements, and how the CTMU and A/D
modules are related in this application. This example
also shows both edge events coming from the external
CTED pins, but other configurations using internal
edge sources are possible.
25.3
The CTMU module can also generate an output pulse
with edges that are not synchronous with the device’s
system clock. More specifically, it can generate a pulse
with a programmable delay from an edge event input to
the module.
FIGURE 25-2:
FIGURE 25-3:
 2011 Microchip Technology Inc.
AD
) and a precision resistor for current calibration.
Measuring Time
Pulse Generation and Delay
displays the external connections used for
TYPICAL CONNECTIONS AND INTERNAL CONFIGURATION FOR TIME
MEASUREMENT
TYPICAL CONNECTIONS AND INTERNAL CONFIGURATION FOR PULSE
DELAY GENERATION
C
CTED
C2INB
DELAY
X
CTED
CTED
ANx
R
PR
X
X
EDG1
PIC24FV32KA304 FAMILY
CV
Current Source
PIC24F Device
REF
Comparator
-
CTMU
C2
EDG1
EDG2
When the module is configured for pulse generation
delay by setting the TGEN bit (CTMUCON<12>), the
internal current source is connected to the B input of
Comparator 2. A capacitor (C
the Comparator 2 pin, C2INB, and the comparator
voltage reference, CV
CV
module begins to charge C
is detected. When C
trip point, a pulse is output on CTPLS. The length of the
pulse delay is determined by the value of C
the CV
Figure 25-3
pulse generation, as well as the relationship of the
different analog modules required. While CTED1 is
shown as the input pulse source, other options are
available. A detailed discussion on pulse generation
with the CTMU module is provided in the “PIC24F
Family Reference Manual”.
C
PIC24F Device
A/D Converter
AD
REF
Current Source
CTMU
REF
is then configured for a specific trip point. The
Output Pulse
trip point.
illustrates the external connections for
DELAY
CTPLS
REF
, is connected to C2INA.
DELAY
charges above the CV
DELAY
when an edge event
DS39995B-page 233
) is connected to
DELAY
and
REF