PIC24FV32KA302T-I/ML Microchip Technology, PIC24FV32KA302T-I/ML Datasheet - Page 222

• Manufacturer Part Number: PIC24FV32KA302T-I/ML
• Description: 32KB Flash, 2KB RAM, 512B EEPROM, 16 MIPS, 12-bit ADC, CTMU, 5V 28 QFN 6x6mm T/R
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 24Fr

Specifications of PIC24FV32KA302T-I/ML

• Core Processor: PIC
• Core Size: 16-Bit
• Speed: 32MHz
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 23
• Program Memory Size: 32KB (11K x 24)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 13x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-VQFN Exposed Pad
• Processor Series: PIC24FV
• Core: PIC
• Data Bus Width: 16 bit
• Data Ram Size: 2 KB
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: MPLAB IDE Software
• Minimum Operating Temperature: - 40 C
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC24FV32KA304 FAMILY
REGISTER 22-10: AD1CTMENH: CTMU ENABLE REGISTER (HIGH WORD)
REGISTER 22-11: AD1CTMENL: CTMU ENABLE REGISTER (LOW WORD)
DS39995B-page 222
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-2
bit 1-0
Note 1:
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-0
Note 1:
CTMEN15
CTMEN7
R/W-0
R/W-0
U-0
U-0
—
—
Unimplemented channels are read as ‘0’.
Unimplemented channels are read as ‘0’.
Unimplemented: Read as ‘0’.
CTMEN<17:16>: CTMU Enabled During Conversion bits
1 = CTMU is enabled and connected to the selected channel during conversion
0 =CTMU is not connected to this channel
CTMEN<15:0>: CTMU Enabled During Conversion bits
1 = CTMU is enabled and connected to the selected channel during conversion
0 = CTMU is not connected to this channel
CTMEN14
CTMEN6
R/W-0
R/W-0
U-0
U-0
—
—
W = Writable bit
‘1’ = Bit is set
W = Writable bit
‘1’ = Bit is set
CTMEN13
CTMEN5
R/W-0
R/W-0
U-0
U-0
—
—
CTMEN12
CTMEN4
R/W-0
R/W-0
U-0
U-0
—
—
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
CTMUEN11
CTMEN3
R/W-0
R/W-0
U-0
U-0
—
—
CTMEN10
CTMEN2
R/W-0
R/W-0
U-0
U-0
—
—
 2011 Microchip Technology Inc.
(1)
(1)
x = Bit is unknown
x = Bit is unknown
CTMEN17
CTMEN9
CTMEN1
R/W-0
R/W-0
R/W-0
U-0
—
CTMEN16
CTMEN8
CTMEN0
R/W-0
R/W-0
R/W-0
U-0
—
bit 8
bit 0
bit 8
bit 0