SP3232EHCT-L/TR Exar Corporation, SP3232EHCT-L/TR Datasheet - Page 9

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SP3232EHCT-L/TR

Manufacturer Part Number
SP3232EHCT-L/TR
Description
3.3V, 460Kbps RS-232 Transceivers
Manufacturer
Exar Corporation
Type
Transceiverr
Datasheet

Specifications of SP3232EHCT-L/TR

Number Of Drivers/receivers
2/2
Protocol
RS232
Voltage - Supply
3 V ~ 5.5 V
Mounting Type
Surface Mount
Package / Case
16-SOIC (0.300", 7.50mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Figure 7. Loopback Test results at 120kbps
Figure 6. SP3232EH Driver Loopback Test Circuit
Figure 8. Loopback Test results at 460kbps
OUTPUTS
R1 OUT
T1 OUT
INPUTS
LOGIC
LOGIC
T1 IN
C2
C5
C1
+
+
+
0.1µF
0.1µF
0.1µF
C1+
C2+
C2-
TxIN
C1-
RxOUT
Exar Corporation 48720 Kato Road, Fremont CA, 94538 • 510-668-7017 • www.exar.com
SP3232EH
V
V
GND
CC
CC
5kΩ
TxOUT
RxIN
V+
V-
1000pF
C3
C4
+
+
0.1µF
0.1µF
9
of 5.5V, the charge pump is enabled. If the
output voltages exceed a magnitude of 5.5V,
the charge pump is disabled. This oscillator
controls the four phases of the voltage shift-
ing. A description of each phase follows.
Phase 1
— V
of the clock cycle, the positive side of capaci-
tors C
C
in C
nected to V
capacitor C
Phase 2
— V
connects the negative terminal of C
storage capacitor and the positive terminal of
C
ated voltage to C
regulated to a minimum voltage of -5.5V.
Simultaneous with the transfer of the volt-
age to C
is switched to V
connected to GND.
Phase 3
— V
the clock is identical to the first phase — the
charge transferred in C
the negative terminal of C
to the negative side of capacitor C
C
is 2 times V
Phase 4
— V
the clock connects the negative terminal
of C
generated voltage across C
V
regulated to +5.5V. At this voltage, the in-
ternal oscillator is disabled. Simultaneous
with the transfer of the voltage to C
positive side of capacitor C
to V
nected to GND, allowing
pump cycle to begin again. The charge
pump cycle will continue as long as the
operational conditions for the internal
oscillator are present.
DD
l
2
2
+
+
to GND. This transfers a negative gener-
is then switched to GND and the charge
is at V
1
DD
SS
2
CC
SS
storage capacitor.
DD
is transferred to C
1
to GND, and transfers this positive
charge storage — During this phase
charge storage — The third phase of
transfer — Phase two of the clock
and C
and
transfer — The fourth phase of
3
, the positive side of capacitor C
CC
2
, the voltage potential across C
CC
CC
is now 2 times V
, the voltage potential across
2
.
the
are initially charged to V
CC
3
. This generated voltage is
and the negative side is
negative side is con-
2
1
. Since C
1
produces –V
, which is applied
This voltage is
SP3232EH_100_010611
DESCRIPTION
1
CC
2
the charge
is switched
.
to C
2
to the V
2
2
+
. Since
is con-
4
4
, the
, the
CC
CC
in
SS
.
1
2

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