STM8AF6266TAX STMicroelectronics, STM8AF6266TAX Datasheet - Page 22

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STM8AF6266TAX

Manufacturer Part Number
STM8AF6266TAX
Description
8 BITS MICROCONTR
Manufacturer
STMicroelectronics
Series
STM8Ar
Datasheet

Specifications of STM8AF6266TAX

Core Processor
STM8A
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
25
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 7x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-LQFP
Lead Free Status / Rohs Status
 Details

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Product overview
5.9.3
22/91
Universal asynchronous receiver/transmitter with LIN support
(LINUART)
The devices covered by this datasheet contain one LINUART interface. The interface is
available on all the supported packages. The LINUART is an asynchronous serial
communication interface which supports extensive LIN functions tailored for LIN slave
applications. In LIN mode it is compliant to the LIN standards rev 1.2 to rev 2.1.
Detailed feature list:
LIN mode
Master mode:
Slave mode:
UART mode
Wakeup from Halt on address detection in slave mode
LIN break and delimiter generation
LIN break and delimiter detection with separate flag and interrupt source for read back
checking.
Autonomous header handling – one single interrupt per valid header
Mute mode to filter responses
Identifier parity error checking
LIN automatic resynchronization, allowing operation with internal RC oscillator (HSI)
clock source
Break detection at any time, even during a byte reception
Header errors detection:
Full duplex, asynchronous communications - NRZ standard format (mark/space)
High-precision baud rate generator
Programmable data word length (8 or 9 bits) – 1 or 2 stop bits – parity control
Separate enable bits for transmitter and receiver
Error detection flags
Reduced power consumption mode
Multi-processor communication - enter mute mode if address match does not occur
Wakeup from mute mode (by idle line detection or address mark detection)
Two receiver wakeup modes:
Successful address/data communication
Error condition
Wakeup from Halt
Delimiter too short
Synch field error
Deviation error (if automatic resynchronization is enabled)
Framing error in synch field or identifier field
Header time-out
A common programmable transmit and receive baud rates up to f
Doc ID 14952 Rev 5
STM8AF61xx, STM8AF62xx
MASTER
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