STM8AF6266TAX STMicroelectronics, STM8AF6266TAX Datasheet - Page 74

• Manufacturer Part Number: STM8AF6266TAX
• Description: 8 BITS MICROCONTR
• Manufacturer: STMicroelectronics
• Series: STM8Ar

Specifications of STM8AF6266TAX

• Core Processor: STM8A
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 25
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 7x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-LQFP
• Lead Free Status / Rohs Status: Details

Electrical characteristics
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Table 43.
1. Max value is based on characterization, not tested in production.
2. ADC accuracy vs. injection current: Any positive or negative injection current within the limits specified for
3. TUE 2LSB can be reached on specific salestypes on the whole temperature range.
4. Target values.
Figure 41. ADC accuracy characteristics
1. Example of an actual transfer curve
2. The ideal transfer curve
3. End point correlation line
|E
|E
|E
|E
|E
|E
|E
|E
|E
|E
Symbol
T
O
G
D
L
T
O
G
D
L
I
E
E
E
E
E
line.
|
|
|
|
INJ(PIN)
|
|
|
|
|
|
T
O
G
D
L
= Total unadjusted error: Maximum deviation between the actual and the ideal transfer curves.
= Integral linearity error: Maximum deviation between any actual transition and the end point correlation
= Differential linearity error: Maximum deviation between actual steps and the ideal one.
= Offset error: Deviation between the first actual transition and the first ideal one.
= Gain error: Deviation between the last ideal transition and the last actual one.
and ΣI
Total unadjusted error
Offset error
Gain error
Differential linearity error
Integral linearity error
Total unadjusted error
Offset error
Gain error
Differential linearity error
Integral linearity error
ADC accuracy for V
INJ(PIN)
1023
1022
1021
(2)
(2)
in
7
6
5
4
3
2
1
Parameter
V
(2)
(2)
0
Section 10.3.6
SSA
1LSB
1
E
O
2
IDEAL
Doc ID 14952 Rev 5
(2)
(2)
(2)
(2)
3
DDA
(2)
(2)
does not affect the ADC accuracy.
=
4
V
---------------------------------------- -
= 5 V
DDA
5
1 LSB
1024
–
E
6
f
f
V
T
ADC
ADC
Conditions
SSA
IDEAL
E
7
L
(2)
= 2 MHz
= 4 MHz
E
D
1021102210231024
(3)
(1)
STM8AF61xx, STM8AF62xx
E
G
1.9
1.3
0.6
1.5
1.2
Typ
1.4
0.8
0.1
0.9
0.7
(4)
(4)
(4)
(4)
(4)
V
DDA
Max
1.5
3
4
4
3
2
1.5
3
2
1
(3)
(4)
(4)
(4)
(4)
(4)
(1)
Unit
LSB