SY56040ARMY TR Micrel Inc, SY56040ARMY TR Datasheet - Page 7

• Manufacturer Part Number: SY56040ARMY TR
• Description: LV CML 4x4 Crosspoint W/o EQ
• Manufacturer: Micrel Inc

Specifications of SY56040ARMY TR

• Function: Crosspoint Switch
• Circuit: 1 x 4:4
• Voltage Supply Source: Single Supply
• Voltage - Supply, Single/dual (±): 2.375 V ~ 2.625 V, 1.14 V ~ 1.9 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 44-MLF®, QFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 576-3311-2

AC Electrical Characteristics
V
V
V
Notes:
6.
7.
8.
9.
10. Output-to-Output skew is the difference in time between 4 outputs, receiving data from the same input, for the same temperature, voltage and transition.
11. Part-to-part skew is defined for two parts with identical power supply voltages at the same temperature and no skew at the edges at the respective inputs.
12. Random jitter is measured with a K28.7 pattern, measured at ≤ f
13. Deterministic jitter is measured at 2.5Gbps with both K28.5 and 2
14. Cycle-to-cycle jitter definition: the variation period between adjacent cycles over a random sample of adjacent cycle pairs. t
15. Total jitter definition: with an ideal clock input frequency of ≤ f
16. Crosstalk induced jitter is defined as the added jitter that results from signals applied to the adjacent channel. It is measured at the output. While applying
Symbol
f
t
t
t
t
t
t
t
September 2008
CCO
CCO
CC
MAX
PD
PW
S
H
Skew
Jitter
R
, t
= 2.375V to 2.625V. T
High frequency AC electrical values are guaranteed by design and characterization.
Set-up time is the time a signal has to be present before the rising edge of the clock /control signal comes by. For example, t
requires the time SIN has to transition before the L-H edge of the LOAD/CONFIG signal asserts.
Hold time is the time a signal has to be present after the falling edge of the clock edge/control signal comes by. For example, t
defines the time SIN signal has to transition after the H-L edge of the LOAD/CONFIG signal asserts.
Input-to-Input skew is the difference in time between 4 inputs, measured at the same output, for the same temperature, voltage, and transition.
the time between rising edges of the output signal.
specified peak-to-peak jitter value.
a similar, differential clock frequency to both inputs that is asynchronous with respect to each other.
F
= 1.14V to 1.26V, R
= 1.7V to 1.9V, 2.375V to 2.625V, R
Parameter
Maximum Data Rate/ Frequency
Propagation Delay
Pulse Width of LOAD/CONFIGIG signal
Set-up Time
Hold time
Input-to-Input skew
Output-to-Output skew
Part-to-Part Skew
Data
Clock
Output Rise/Fall Times (20% to 80%)
Duty Cycle
L
= 50Ω to V
A
SOUT-to-LOAD/CONFIG
LOAD/CONFIG-to-SOUT
= –40°C to +85°C, unless otherwise stated.
Crosstalk Induced Jitter
SIN-to-LOAD/CONFIG
LOAD/CONFIG-to-SIN
Cycle-to-Cycle Jitter
(Adjacent Channel)
Deterministic Jitter
LOAD/CONFIG-Q
LOAD-to-CONFIG
CONFIG-to-LOAD
SOUT-to-LOAD
LOAD-to-SOUT
CCO,
Random Jitter
CONFIG-to-Q
LOAD-to-SIN
SIN-to-LOAD
(6)
Total Jitter
L
= 50Ω to V
IN-to-Q
MAX
MAX
(device), no more than one output edge in 10
23
CCO
–1 PRBS pattern.
Condition
NRZ Data
V
Note 7, Fig. 1b, Fig. 1c
Note 8, Fig. 1b, Fig. 1c
Note 9
Note 10
Note 12
Note 13
Note 14
Note 15
Note 16
At full output swing.
Differential I/O ≤ 4GHz
Differential I/O ≤ 5GHz
.
Note 11
OUT
or 100Ω across the outputs.
> 200mV
7
Clock
[e-mail]
1500
1400
Min
200
600
600
800
800
300
800
500
600
500
12
6.4
20
47
45
5
output edges will deviate by more than the
Typ
290
450
850
25
12
50
JITTER
S
(SIN-LOAD/CONFIG),
H
(LOAD/CONFIG-SIN)
_
CC
or [phone]
M9999-093008-A
= T
Max
400
0.7
n
50
25
75
10
10
80
53
55
1
1
–T
n+1
, where T is
Units
ps
ps
Gbps
GHz
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
%
%
RMS
RMS
PP
PP
PP