AD1985JSTZREEL Analog Devices Inc, AD1985JSTZREEL Datasheet
AD1985JSTZREEL
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AD1985JSTZREEL Summary of contents
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AC ’97 2.3 COMPLIANT FEATURES 6 DAC channels for 5.1 surround Greater than 90 dB dynamic range 20-bit resolution on all DACs S/PDIF Output Integrated stereo headphone amplifiers Variable rate audio Double rate audio ( kHz) S Line-level ...
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AD1985 TABLE OF CONTENTS Detailed Functional Block Diagram .............................................. 3 Specifications..................................................................................... 4 Analog Input ................................................................................. 4 Master Volume .............................................................................. 4 Programmable Gain Amplifier—ADC...................................... 4 Analog Mixer—Input Gain/Amplifiers/Attenuators............... 5 Digital Decimation and Interpolation Filters ........................... 5 Analog-to-Digital Converters..................................................... 5 Digital-to-Analog Converters..................................................... ...
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DETAILED FUNCTIONAL BLOCK DIAGRAM MS 2CMIC OMS OMS V2.3 INTERFACE '97 AC STORAGE CSWP CSWP SPRD SPRD LOSEL Figure 2. Detailed Functional Block Diagram Rev Page COEF EQ BYPASS BYPASS HPSEL HPSEL MIX LOSEL AD1985 ...
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AD1985 SPECIFICATIONS Table 1. Test Conditions, Unless Otherwise Noted Parameter Value/Condition TEMPERATURE 25 DIGITAL SUPPLY (DV ) 3.3 DD ANALOG SUPPLY (AV ) 5.0 DD SAMPLE RATE ( INPUT SINE WAVE SIGNAL 1,008 ANALOG OUTPUT PASS BAND ...
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ANALOG MIXER—INPUT GAIN/AMPLIFIERS/ATTENUATORS Table 5. Parameter SIGNAL-TO-NOISE RATIO (SNR LINE_OUT LINE, AUX, PHONE, to LINE_OUT MIC1 or MIC2 to LINE_OUT Step Size: All Mixer Inputs, Except PC Beep Input Gain/Attenuation Range (+ –34.5 dB): All Mixer ...
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AD1985 ANALOG OUTPUT Table 9. Parameter FULL-SCALE OUTPUT VOLTAGE: LINE OUT, MONO OUT, CENTER, LFE 1 Output Impedance 1 External Load Impedance 1 Output Capacitance External Load Capacitance FULL-SCALE OUTPUT VOLTAGE: HP_OUT 1 External Load Capacitance 1 External Load Impedance ...
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POWER-DOWN STATES Table 12. Parameter FULL POWER-UP ADC FRONT DAC CENTER DAC SURROUND DAC LFE DAC ADC + ALL DACs MIXER ADC + MIXER ALL DACS + MIXER ADC + ALL DACS + MIXER STANDBY HEADPHONE STANDBY CLOCK SPECIFICATIONS ...
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AD1985 TIMING PARAMETERS Guaranteed over operating temperature range. Table 14. Parameter RESET ACTIVE LOW PULSE WIDTH RESET INACTIVE TO SDATA_IN OR BIT_CLK ACTIVE DELAY SYNC ACTIVE HIGH PULSE WIDTH SYNC LOW PULSE WIDTH SYNC INACTIVE TO BIT_CLK STARTUP DELAY BIT_CLK ...
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RESET BIT_CLK SDATA_IN SYNC BIT_CLK t CLK_LOW BIT_CLK t CLK_HIGH t CLK_PERIOD t SYNC t SYNC_HIGH t SYNC_PERIOD Figure 5. Clock Timing BIT_CLK t RISECLK SYNC t RISESYNC SDATA_IN t RISEDIN SDATA_OUT t RISEDOUT Figure 6. Signal Rise and Fall ...
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AD1985 ABSOLUTE MAXIMUM RATINGS Table 15. Parameter POWER SUPPLIES Digital ( Analog ( INPUT CURRENT (EXCEPT SUPPLY PINS) ANALOG INPUT VOLTAGE (SIGNAL PINS) DIGITAL INPUT VOLTAGE (SIGNAL PINS) AMBIENT TEMPERATURE (OPERATING) STORAGE TEMPERATURE Stresses above those ...
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PIN CONFIGURATION AND FUNCTION DESCRIPTIONS DV XTL_IN XTL_OUT DV SDATA_OUT BIT_CLK DV SDATA_IN DV SYNC RESET Circuit Layout Note: In normal operation, Surround and Line Out are swapped to provide headphone drive on line outputs. Therefore, Pins 35 and 36 ...
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AD1985 Table 20. Analog I/O Mnemonic Pin No. I/O PHONE_IN 13 I AUX_L 14 I AUX_R 15 I CD_L 18 I CD_GND_REF 19 I CD_R 20 I MIC1 21 I MIC2 22 I LINE_IN_L 23 I LINE_IN_R 24 I CENTER_OUT ...
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INDEXED CONTROL REGISTERS Reg Name D15 D14 D13 0x00 Reset X SE4 SE3 0x02 Master Volume 0x04 Headphones Volume HPM X X 0x06 Mono Volume MVM X X 0x0A PC Beep PCBM X X 0x0C Phone_In Volume ...
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AD1985 Reset (Index 0x00) Reg Num Name D15 D14 0x00 Reset X SE4 Note: Writing any value to this register performs a register reset, which causes all registers (except Register 0x74) to revert to their default values. Register 0x74 will ...
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Master Volume Register (Index 0x02) Reg Num Name D15 D14 D13 D12 D11 D10 D9 0x02 Master Volume For AC ’97 compatibility, Bit D7 (MMRM) is available only by setting the MSPLT bit in Register 0x76. The ...
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AD1985 Headphone Volume Register (Index 0x04) Reg Num Name D15 D14 D13 D12 D11 D10 D9 0x04 Headphones Volume HPM 1 For AC ’97 compatibility, Bit D7 (HPRM) is available only by setting the MSPLT bit in Register 0x76. The ...
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Mono Volume Register (Index 0x06) Reg Num Name D15 0x06 Mono Volume MVM This register controls the mono output volume and mute bit. The volume register contains five bits, generating 32 volume levels with increments of 1.5 dB each. MV[4:0] ...
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AD1985 PC Beep Register (Index 0x0A) Reg Name D15 D14 D13 D12 0x0A PC Beep Volume PCBM X X This register controls the level and frequency for the digital PC beep generated by the codec. Please note that PC Beep ...
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Phone_In Volume Register (Index 0x0C) Reg Num Name D15 D14 D13 D12 D11 D10 0x0C Phone_In Volume PHM X PHV[4:0] Phone Volume. Allows setting the phone volume gain/attenuator to one of 32 levels. The ...
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AD1985 Line In Volume (Index 0x10) Reg Num Name D15 D14 D13 D12 D11 D10 D9 0x10 Line In Volume For AC ’97 compatibility, Bit D7 (LVRM) is available only by setting the MSPLT bit in Register ...
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AUX In Volume Register (Index 0x16) Reg Num Name D15 D14 D13 D12 D11 D10 D9 0x16 AUX In Volume For AC ’97 compatibility, Bit D7 (AVRM) is available only by setting the MSPLT bit in Register ...
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AD1985 Record Select Control Register (Index 0x1A) Reg Num Name D15 D14 D13 D12 D11 D10 D9 0x1A Record Select X This register is used to select the record source, independently for the right and left channels. For single MIC ...
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Record Gain Register (Index 0x1C) Reg Num Name D15 D14 D13 D12 D11 0x1C Record Gain For AC ’97 compatibility, Bit D7 (IMRM) is available only by setting the MSPLT bit in Register 0x76. The MSPLT bit ...
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AD1985 General Purpose Register (Index 0x20) Reg Num Name D15 D14 D13 D12 D11 0x20 General Purpose X LPBK Loopback Control. This bit enables the digital internal loopback from the ADC to the front DAC. This feature is normally used ...
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... Software should not unmask the interrupt unless the AC ’97 controller ensures that no conflict is possible with modem Slot 12— GPI functionality. AC ’97 2.2 compliant controllers will not likely support audio codec interrupt infrastructure. In that case, software can poll the interrupt status after initiating a sense cycle and waiting for the Sense Cycle Maximum Delay (which is defined by the software) to determine if an interrupting event has occurred ...
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AD1985 Power-Down Control/Status Register (Index 0x26) Reg Num Name 0x26 Power-Down Ctrl/Stat Note that the ready bits are read-only; writing to REF, ANL, DAC, and ADC will have no effect. These bits indicate the status for the AD1985 subsections. If ...
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Extended Audio ID Register (Index 0x28) Reg Name D15 D14 D13 D12 D11 D10 D9 Num 0x28 Extended AID1 AID0 X X REV1 REV0 AMAP AIDLDAC AIDSDAC AIDCDAC DSA1 DSA0 X AIDSPDIF DRA Audio ID The extended audio ID register ...
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AD1985 Extended Audio Status and Control Register (Index 0x2A) Reg Name D15 D14 D13 D12 D11 D10 D9 D8 Num 0x2A Extended VFORCE X PRK PRJ PRI SPCV X ASCLDAC ASCSDAC ASCCDAC SPSA1 SPSA0 X ASCSPDF ASCDRA ASCVRA 0xXXXX Audio ...
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AC ‘97 2.3 AMAP Compliant Default SPDIF Slot Assignments Codec ID Function 00 2-ch Primary with SPDIF 00 4-ch Primary with SPDIF 00 6-ch Primary with SPDIF 01 +2-ch Secondary with SPDIF 01 +4-ch Secondary with SPDIF 10 +2-ch Secondary ...
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AD1985 PCM L/R ADC Rate Register (Index 0x32) Reg Num Name D15 D14 0x32 PCM L/R ADC Rate SRA15 SRA14 SRA13 SRA12 SRA11 SRA10 SRA9 SRA8 SRA7 SRA6 SRA5 SRA4 SRA3 SRA2 SRA1 SRA0 0xBB80 This read/write sample rate control ...
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Surround Volume Control Register (Index 0x38) Reg Num Name D15 D14 D13 D12 D11 D10 D9 0x38 Surround Volume LSM X This register controls the surround volume controls for both stereo channels and mute bits. Each volume subregister contains five ...
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AD1985 SPDIF Control Register (Index 0x3A) Reg.Num. Name D15 D14 D13 0x3A SPDIF Control V X Register 0x3A is a read/write register that controls SPDIF functionality and manages bit fields propagated as channel status (or subframe in the V case). ...
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EQ Control Register (Index 0x60) Reg.Num. Name D15 D14 D13 D12 D11 D10 0x60 EQ Control EQM X Register 0x60 is a read/write register that controls equalizer function and data setup. The register also contains the biquad ...
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AD1985 EQ Data Register (Index 0x62) Reg.Num. Name D15 D14 D13 0x62 EQ Data CFD15 CFD14 CFD13 CFD12 CFD11 CFD10 CFD9 CFD8 CFD7 CFD6 CFD5 CFD4 CFD3 CFD2 CFD1 CFD0 0x0000 This read/write register is used to transfer EQ biquad ...
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Jack Sense/General Register (Index 0x70) Reg Num Name D15 D14 D13 D12 D11 D10 0x70 J Sense/General X JS2SEL Selects JS2 Input Behavior. 0: Standard operation for JS2 jack sensing (default). 1: Enable microphone input sensing with ...
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AD1985 Jack Sense/Audio Interrupt/Status Register (Index 0x72) Reg Num Name D15 D14 0x72 Jack Sense/ JS JS1 Audio/Status SPRD DMX Note: All register bits are read/write except for JS0ST and JS1ST, which are read-only. JS0INT Indicates Pin JS0 has generated ...
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Jack Sense Mute Select (JSMT [2:0]) REF JS1 JS0 JSMT2 JSMT1 JSMT0 0 OUT (0) OUT ( OUT ( (1) OUT ( ( ...
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AD1985 Serial Configuration (Index 0x74) Reg Num Name D15 D14 D13 0x74 Serial SLOT16 REGM2 REGM1 REGM0 REGM3 DRF OMS CHEN SPOVR LBKS1 LBKS0 INTS CSWP SPAL SPDZ SPLNK 0x1001 Config. Note: This register will only reset bits CSWP (D3), ...
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Miscellaneous Control Bits (Index 0x76) Reg Num Name D15 D14 D13 0x76 Misc DACZ AC97NC MSPLT LODIS CLDIS HPSEL DMIX1 DMIX0 SPRD 2CMIC LOSEL SRU VREFH VREFD MBG1 MBG0 0x0000 Control Bits MBG[1:0] MIC Boost Gain Select Register. These two ...
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AD1985 DMIX[1:0] Down-Mix Mode Select. Provides analog down-mixing of the center, LFE, and/or surround channels into the mixer channels. This allows the full content of 5.1 or quad media to be played through stereo headphones or speakers. Note that the ...
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Advanced Jack Sense Register (Index 0x78) Reg Num Name D15 D14 D13 D12 D11 D10 0x78 Advanced Jack Sense Note: All register bits are read/write except for JS2ST and JS3ST, which are read-only. JS2INT ...
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AD1985 Codec Class/Revision Register (Index 0x60, Page 01) Reg Num Name D15 D14 D13 D12 D11 D10 D9 0x60 Codec Class/Rev X New register added for AC ’97 2.3. RV[7:0] Revision ID. (Read-only.) The initial production version of the AD1985 ...
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Function Select Register (Index 0x66, Page 01) Reg Num Name D15 D14 D13 D12 D11 D10 0x66 Function Select X New register added for AC ’97 2.3. FC[3:0] Function Code Bits. (Default 0.) These ...
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AD1985 Information and I/O Register (Index 0x68, Page 01) Reg Num Name 0x68 Function Information New register added for AC ’97 2.3. Data read back from this register is invalid unless a function is first specified in Register 0x66, page ...
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Sense Register (Index 0x6A, Page 01) Reg Num Name D15 D14 D13 D12 D11 D10 0x6A Sense Register ST2 New register added for AC ’97 2.3. ST[2:0] Connector/Jack Location Bits. (Read/write.) This field describes the location of ...
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AD1985 OR[1:0] Order Bits. These bits indicate the order of magnitude that the sense result Bits SR[5:0] are using. Default is 0x0 11: 10 For example ...
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OUTLINE DIMENSIONS 1.45 1.40 1.35 0.15 SEATING 0.05 PLANE ROTATED 90 ° CCW ORDERING GUIDE Model Temperature Range AD1985JST 0°C to +70°C AD1985JST-REEL 0°C to +70°C 1 AD1985JSTZ 0°C to +70°C AD1985JSTZ-REEL 1 0°C to +70° Pb-free ...
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AD1985 NOTES © 2004 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. C03610–0–3/04(A) Rev Page ...