AD1985JSTZREEL Analog Devices Inc, AD1985JSTZREEL Datasheet - Page 15

• Manufacturer Part Number: AD1985JSTZREEL
• Manufacturer: Analog Devices Inc

Specifications of AD1985JSTZREEL

• Single Supply Voltage (typ): 3.3/5V
• Single Supply Voltage (min): 2.97/4.5V
• Single Supply Voltage (max): 3.63/5.5V
• Package Type: LQFP
• Lead Free Status / RoHS Status: Compliant

Reg Num Name
0x02
Master Volume Register (Index 0x02)
1
channels.
This register controls the LINE_OUT volume and mute bits.
Each volume subregister contains five bits, generating 32
volume levels with increments of 1.5 dB each.
AC ’97 defines the 6-bit volume registers, therefore, to maintain
compatibility whenever the D5 or D13 bit is set to 1, its
respective lower five volume bits are automatically set to 1 by
the codec logic. On readback, all lower five bits will read 1s
whenever these bits are set to 1.
Volume Settings for Master and Headphone
Note: x in the above table is a wild card, meaning the value has no effect.
1
MSPLT is not set, Bit D7 has no effect.
RMV[4:0]
MMRM
LMV[4:0]
MM
For AC ’97 compatibility, Bit D7 (MMRM) is available only by setting the MSPLT bit in Register 0x76. The MSPLT bit enables separate mute bits for the left and right
Reg.
0x76
MSPLT
0
0
0
0
0
1
1
1
For AC ’97 compatibility, Bit D7 is available only by setting the MSPLT bit, Register 0x76. The MSPLT bit enables separate mute bits for the left and right channels. If
1
Master Volume
D15
0
0
0
0
1
0
1
1
Write
00
0000
00
1111
01
1111
1x xxxx
xx xxxx
1x xxxx
xx xxxx
xx xxxx
Right Master Volume Control. The least significant bit represents 1.5 dB. This register controls the output from
0 dB to a maximum attenuation of 46.5 dB.
Right Channel Mute. Once enabled by the MSPLT bit in Register 0x76, this bit mutes the right channel
separately from the MM bit. Otherwise, this bit will always read 0 and will have no effect when set to 1.
Left Master Volume Control. The least significant bit represents 1.5 dB. This register controls the output from
0 dB to a maximum attenuation of 46.5 dB.
Master Volume Mute. When this bit is set to 1, all channels are muted, unless the MSPLT bit in Register 0x76 is
set to 1, in which case, this mute bit will only affect the left channels.
Left Channel Volume D[13:8]
D15 D14 D13 D12 D11 D10 D9
MM X
xx xxxx
Readback
00 0000
00 1111
01 1111
01 1111
xx xxxx
01 1111
xx xxxx
X
LMV4 LMV3 LMV2 LMV1 LMV0 MMRM
Function
0 dB Gain
–22.5 dB Gain
–46.5 dB Gain
–46.5 dB Gain
–∞ dB Gain, Muted
–46.5 dB Gain
–∞ dB Gain, Only Left
Muted
–∞ dB Gain, Left Muted
Master Volume (0x02) and Headphone Volume (0x04)
Rev. A | Page 15 of 48
Control Bits
D8
Note that depending on the state of the AC97NC bit in Register
0x76, this register has the following additional functionality:
• For AC97NC = 0, the register controls the LINE_OUT output
• For AC97NC = 1, the register controls the LINE_OUT, center,
attenuators only.
and LFE output attenuators.
D7
x
x
x
x
x
1
0
1
D7
1
Write
00
0000
00
1111
01
1111
1x xxxx
xx xxxx
xx xxxx
1x xxxx
xx xxxx
1
D6 D5 D4
X X RMV4 RMV3 RMV2 RMV1 RMV0 0x8000
Right Channel Volume D[5:0]
Readback
00 0000
00 1111
01 1111
01 1111
xx xxxx
xx xxxx
01 1111
xx xxxx
D3
D2
Function
0 dB Gain
–22.5 dB Gain
–46.5 dB Gain
–46.5 dB Gain
–∞ dB Gain, Muted
–∞ dB Gain, Only Right
Muted
–46.5 dB Gain
–∞ dB Gain, Right Muted
D1
D0
AD1985
Default