M38510/21002BJA QP SEMICONDUCTOR, M38510/21002BJA Datasheet - Page 13

• Manufacturer Part Number: M38510/21002BJA
• Manufacturer: QP SEMICONDUCTOR

Specifications of M38510/21002BJA

• Lead Free Status / RoHS Status: Not Compliant

procedures shall be used for programming the device.
procedures shall be used for programming the device:
4.15 Programming procedures for circuit H. The programming characteristics of table IVH and the following
4.16 Programming procedures for circuit I. The programming characteristics in table IVI and the following
m. Return to 4.15e until all outputs in the word have been programmed.
n. Repeat 4.15c through 4.15l for each word in memory.
o. Verify programming of every word after all words have been programmed using V
p. If any bit does not verify as programmed, it shall be considered a programming reject.
a. Connect the device in the electrical configuration for programming. The waveforms on figure 5H and
b. Address the word to be programmed, apply 5 V to V
c. Verify the status of a bit location by checking the output level.
d. Decrease V
e. For bit locations that do not require programming, skip steps 4.15f through 4.15l.
f. Increase V
g. Apply V
h. Connect all outputs, except the one to be programmed, to V
i. Apply the output programming pulse for 20 µs. Minimum current capability of the programming supply
j. After terminating the output pulse, disconnect all outputs from V
k. Reduce the voltage at CE input to V
l. Decrease V
a. Connect the device in the electrical configuration for programming. The waveforms on figure 5I and the
b. Terminate all outputs with a 300 Ω resistor to V
c. Address the PROM with the binary address of the selected word to be programmed. Raise V
d. After a delay of t
e. To verify programming after CE
the programming characteristics of table IVH shall apply to these procedures.
time.
should be 250 mA.
programming characteristics of table IVI shall apply to these procedures.
V
for programming. After a delay of t
2d(V
programmed output should remain in the logic ‘1’ state.
5.5 V.
ILP
to the CE
CE
)/dt, and t
S(pr)
CC
CC
to all chip Enable inputs. I
CC
to V
to 0 V.
to 0 V.
1
inputs.
1
3
, apply only one V
; CE
CC(pr)
with a minimum current capability of 250 mA.
2
is then to go to V
1
has been set to V
2
OP
and d(V
IL
MIL-M-38510/210E
.
pulse with a duration of t
I
≤ 25 mA. Active-high enables may be left high.
ILP
OP
level.
13
)/dt, pulse CE
ONP
. Apply V
ILP
CC
, lower V
and active levels to all chip Enable inputs.
IL
IHP
. Only one bit is to be programmed at a
2
P
from V
CC
to the CE
IL
, t
to V
conditions.
2
and d(V
IHP
CCL
to V
after a delay of t
2
, CE
OP
CEP
)/dt to the output selected
3
, and CE
for the duration of t
CC
values of 4.5 V and
4
4
inputs and
. The
CC
to V
P
CCP
,
.