SLCF16GM2PU STEC, SLCF16GM2PU Datasheet - Page 7

• Manufacturer Part Number: SLCF16GM2PU
• Manufacturer: STEC

Specifications of SLCF16GM2PU

• Lead Free Status / RoHS Status: Compliant

SLCFxxx(G)M2PU(I)
Datasheet
2.4
BVD2
(PC Card Memory Mode)
-SPKR
(PC Card I/O Mode)
-DASP
(True IDE Mode)
-CD1, -CD2
(PC Card Memory Mode)
-CD1, -CD2
-CD1, -CD2
D15-D00
(PC Card Memory Mode)
D15-D00
PC Card I/O Mode
D15-D00
(True IDE Mode)
-IOWR
(PC Card Memory Mode
except UDMA protocol
active)
STOP
(All Modes: UDMA protocol
active)
-IOWR
(PC Card I/O Mode except
UDMA protocol active)
STOP
(All Modes: UDMA protocol
active)
-IOWR
(True IDE Mode except
UDMA protocol active)
STOP
(All Modes: UDMA protocol
active)
-IORD
(PC Card Memory Mode
except UDMA protocol
active)
(PC Card I/O Mode)
(True IDE Mode)
Signal Description
Signal Name
I/O
I/O
I/O
I
I
Type
Table 4: CF Card Signal Description
45
26, 25
31, 30,
29, 28,
27, 49,
48, 47, 6,
5, 4, 3, 2,
23, 22, 21
35
34
Number
61000-05610-108, April 2009
Pin
This output line is always driven to a high state in Memory
Mode since a battery is not required for this product.
This output line is always driven to a high state in I/O Mode
since this product produces no audio.
In the True IDE Mode, this input/output is the Disk
Active/Slave Present signal in the Master/Slave handshake
protocol.
These Card Detect pins are connected to ground on the card.
They are used by the host to determine that the card is fully
inserted into the socket.
This signal is the same as Memory Mode.
These signals are not used in IDE Mode.
These lines carry the Data, Commands and Status
information between the host and the controller. D00 is the
LSB of the Even Byte of the Word. D08 is the LSB of the Odd
Byte of the Word.
This signal is the same as the PC Card Memory Mode signal.
In True IDE Mode, all Task File operations occur in byte
mode on the low order bus D00-D07 while all data transfers
are 16 bit using D00-D15.
This signal is not used in this mode.
In all modes, while UDMA mode protocol is active, the
assertion of this signal causes the termination of the UDMA
data burst.
The I/O Write strobe pulse is used to clock I/O data onto the
data bus and into the controller registers. The clocking
occurs on the negative to positive edge of the signal (trailing
edge).
Same as STOP above.
In True IDE Mode, this signal has the same function as in PC
Card I/O Mode.
Same as STOP above.
This signal is not used in this mode.
Description
CompactFlash Card
7