WS57C51C-55T STMicroelectronics, WS57C51C-55T Datasheet

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WS57C51C-55T

Manufacturer Part Number
WS57C51C-55T
Description
Manufacturer
STMicroelectronics
Datasheet

Specifications of WS57C51C-55T

Density
128Kb
Organization
16Kx8
Access Time (max)
55ns
Operating Current
50mA
Interface Type
Parallel
Package Type
CDIP
Operating Temperature Classification
Commercial
Operating Supply Voltage (typ)
5V
Operating Temp Range
0C to 70C
Pin Count
28
Mounting
Through Hole
Operating Supply Voltage (min)
4.5V
Operating Supply Voltage (max)
5.5V
Lead Free Status / RoHS Status
Supplier Unconfirmed

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
WS57C51C-55T
Manufacturer:
WSI
Quantity:
6 100
Part Number:
WS57C51C-55T
Manufacturer:
WSI
Quantity:
6 100
Part Number:
WS57C51C-55TI
Manufacturer:
WSI
Quantity:
6 000
Part Number:
WS57C51C-55TMB
Manufacturer:
WSI
Quantity:
3 198
Part Number:
WS57C51C-55TMB
Manufacturer:
WSI
Quantity:
3 198
BLOCK DIAGRAM
The WS57C51C is a High Performance 128K UV Erasable Electrically Re-Programmable Read Only Memory
(RPROM). It is manufactured in an advanced CMOS technology which enables it to operate at Bipolar PROM
speeds while consuming only 25% of the power required by its Bipolar counterparts.
A further advantage of the WS57C51C over Bipolar PROM devices is the fact that it utilizes a proven EPROM
technology. This enables the entire memory array to be tested for switching characteristics and functionality after
assembly. Unlike devices which cannot be erased, every WS5751C in a windowed package is 100% tested with
worst case test patterns both before and after assembly.
The WS57C51C provides a low power alternative to those designs which are committed to a Bipolar PROM
footprint. It is a direct drop-in replacement for a Bipolar PROM of the same architecture (16K x 8). No software,
hardware or layout changes need be performed.
PRODUCT SELECTION GUIDE
Low Power Consumption
Very Fast Access Time
Fast Programming
PARAMETER
Address Access Time (Max)
CS to Output Valid Time (Max)
35 ns
CS2
CS3
A6 - A13
ROW
ADDRESSES
CS1/ V
A0 - A5
COLUMN
ADDRESSES
CS4
Return to Main Menu
PP
6
8
HIGH SPEED 16K x 8 CMOS PROM/RPROM
DECODER
ROW
EPROM ARRAY
131,072 BITS
AMPLIFIERS
DECODER
OUTPUTS
COLUMN
SENSE
8
GENERAL DESCRIPTION
57C51C-35
35 ns
20 ns
KEY FEATURES
PIN CONFIGURATION
NC
O
O
A
A
A
A
A
A
5
4
3
2
1
0
0
1
Pin Compatible with Am27S51
and N82HS1281
Immune to Latch-Up
ESD Protection Exceeds 2000 V
57C51C-45
5
6
7
8
9
10
11
12
13
Up to 200 mA
14 15 16 17 18 19 20
O
Chip Carrier
45 ns
20 ns
4 3 2
2
NC
O
1
3
32 31 30
NC O
4
O
29
28
27
26
25
24
23
22
21
5
TOP VIEW
57C51C-55
A
A
CS1/V
CS2
CS3
CS4
NC
O
O
55 ns
25 ns
12
13
7
6
PP
GND
O
O
O
A
A
A
A
A
A
A
A
A
A
WS57C51C
9
8
7
6
5
4
3
2
1
0
0
1
2
CERDIP
1
2
3
4
5
6
7
8
9
10
11
12
13
14
57C51C-70
70 ns
30 ns
28
27
26
25
24
23
22
21
20
19
18
17
16
15
V
A 10
A 11
A 12
A 13
CS1/V PP
CS2
CS3
CS4
O
O
O
O
O
CC
7
6
5
4
3
2-47

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WS57C51C-55T Summary of contents

Page 1

... It is manufactured in an advanced CMOS technology which enables it to operate at Bipolar PROM speeds while consuming only 25% of the power required by its Bipolar counterparts. A further advantage of the WS57C51C over Bipolar PROM devices is the fact that it utilizes a proven EPROM technology. This enables the entire memory array to be tested for switching characteristics and functionality after assembly ...

Page 2

... WS57C51C ABSOLUTE MAXIMUM RATINGS* Storage Temperature............................–65° 150°C Voltage on any Pin with Respect to Ground ....................................–0.6V to +7V V with Respect to Ground...................–0. 14V PP ESD Protection .................................................. * NOTICE: Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of ...

Page 3

... Output Disable Output Float Address to Output Hold t * Sampled, Not 100% Tested. AC READ TIMING DIAGRAM ADDRESSES CSX, CS3 OUTPUTS Over Operating Range. (See Above) 57C51C-35 57C51C-45 MIN MAX MIN VALID t ACC t CS VALID 57C51C-55 57C51C-70 MAX MIN MAX MIN MAX WS57C51C UNITS ns 2-49 ...

Page 4

... WS57C51C CAPACITANCE ( 25° MHz A SYMBOL PARAMETER C Input Capacitance IN C Output Capacitance OUT C V Capacitance VPP PP NOTES: 4. This parameter is only sampled and is not 100% tested. 5.Typical values are for T = 25°C and nominal supply voltages. A TEST LOAD (High Impedance Test Systems ...

Page 5

... NORMALIZED SUPPLY CURRENT 1.2 1.1 1.0 0.9 0.8 -55 -35 -15 85 105 125 WS57C51C vs. OUTPUT LOADING 200 400 600 800 1000 CAPACITANCE ( pF ) vs. AMBIENT TEMPERATURE 105 125 AMBIENT TEMPERATURE (°C) 2-51 ...

Page 6

... WS57C51C PROGRAMMING INFORMATION DC CHARACTERISTICS SYMBOLS Input Leakage Current Supply Current During Programming Pulse I V Supply Current CC CC Output Low Voltage During Verify mA) OL Output High Voltage During Verify –4 mA) OH NOTE must not be greater than 13 volts including overshoot CHARACTERISTICS SYMBOLS t Address Setup Time ...

Page 7

... WS57C51C-55D 55 WS57C51C-55DMB 55 WS57C51C-55J 55 WS57C51C-55JI 55 WS57C51C-55L 55 WS57C51C-55T 55 WS57C51C-55TI 55 WS57C51C-55TMB 55 WS57C51C-70D 70 WS57C51C-70T 70 NOTES: 8. The actual part marking will not include the initials "WS." PROGRAMMING/ALGORITHMS/ERASURE/PROGRAMMERS The WS57C51C is programmed using Algorithm D shown on page 5-9. Return to Main Menu PACKAGE PACKAGE TYPE DRAWING 28 Pin CERDIP, 0.6" ...

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