FDC37B782-NS Standard Microsystems (SMSC), FDC37B782-NS Datasheet - Page 135

• Manufacturer Part Number: FDC37B782-NS
• Manufacturer: Standard Microsystems (SMSC)

Specifications of FDC37B782-NS

• Lead Free Status / RoHS Status: Supplier Unconfirmed

When writing to the command and data port with
hardware speedup, the IOW timing shown in the
figure titled “IOW Timing for Port 92” in the
Timing Diagrams Section is used. This setup
nIOW+n60=B
64=I/O Addr
60=I/O Addr
nAfterD1+B
nIOW+n64
nAfterD1
AfterD1
nCNTL
nIOW'
nAEN
nIOW
nDD1
GA20
AEN
DD1
CLK
D[1]
n64
n60
nA
0ns
Gate A20 Turn-On Sequence Timing
112
250ns
time is only required to be met when using
hardware speedup; the data must be valid a
minimum of 0 nsec from the leading edge of the
write and held throughout the entire write cycle.
500ns