FDC37B782-NS Standard Microsystems (SMSC), FDC37B782-NS Datasheet - Page 241

• Manufacturer Part Number: FDC37B782-NS
• Manufacturer: Standard Microsystems (SMSC)

Specifications of FDC37B782-NS

• Lead Free Status / RoHS Status: Supplier Unconfirmed

Note 1: The data is held until BUSY goes inactive or for time t3, whichever is longer. This only applies if
NAME
nSTROBE
t1
t2
t3
t4
t5
t6
PDATA
BUSY
another data transfer is pending. If no other data transfer is pending, the data is held indefinitely.
DATA Valid to nSTROBE Active
nSTROBE Active Pulse Width
DATA Hold from nSTROBE Inactive (Note 1)
nSTROBE Active to BUSY Active
BUSY Inactive to nSTROBE Active
BUSY Inactive to PDATA Invalid (Note 1)
TABLE 106 - PARALLEL PORT FIFO TIMING
FIGURE 27 - PARALLEL PORT FIFO TIMING
DESCRIPTION
t1
251
t4
t2
MIN
600
600
450
680
80
TYP
t3
t6
MAX
500
t5
UNITS
ns
ns
ns
ns
ns
ns