AM53CF96KC/W AMD (ADVANCED MICRO DEVICES), AM53CF96KC/W Datasheet - Page 2

• Manufacturer Part Number: AM53CF96KC/W
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of AM53CF96KC/W

• Lead Free Status / RoHS Status: Not Compliant

parity error. This command facilitates data recovery and
thereby minimizes the need to re-transmit data.
AMD’s exclusive power-down feature can be enabled to
help reduce power consumption during the chip’s sleep
mode. The receivers on the SCSI bus may be turned off
to eliminate current that may flow because termination
power (~3 V) is close to the trip point of the input buffers.
The patented GLITCH EATER Circuitry in the
Enhanced SCSI-2 Controller can be programmed to
filter glitches with widths up to 35 ns. It is designed to
dramatically increase system reliability by detecting and
SYSTEM BLOCK DIAGRAM
GLITCH EATER Circuit
GLITCH EATER Circuit
2
GLITCH EATER Circuitry in SCSI Environment
AMD’s Device with the
Note:
The Glitch Window is programmable via Control Register Four (0DH), bits 6 & 7. Window may be set to 35 ns (max). Default
setting is 12 ns (single-ended).
SCSI Environment
AMD
Device without the
Memory
DMA
CPU
16
16
16
4
Am53CF94/Am53CF96
16
8
Addr
Data
DMA
removing glitches that may cause system failure. The
GLITCH EATER Circuitry is implemented on the ACK
and REQ lines since they are most susceptible to
electrical anomalies such as reflections and voltage
spikes. Such signal inconsistencies can trigger false
REQ/ACK handshaking, false data transfers, addition of
random data, and double clocking. AMD’s GLITCH
EATER Circuitry therefore maintains system perform-
ance and improves reliability. The following diagram
illustrates this circuit’s operation.
The Am53CF94 is also available in a 3.3 V version.
Am53CF94/96
9
9
SCSI Data
SCSI Control
Glitch Window
17348B-2
17348B-1