CY8C5487LTI-007 Cypress Semiconductor Corp, CY8C5487LTI-007 Datasheet - Page 65

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CY8C5487LTI-007

Manufacturer Part Number
CY8C5487LTI-007
Description
Manufacturer
Cypress Semiconductor Corp
Datasheet

Specifications of CY8C5487LTI-007

Lead Free Status / RoHS Status
Compliant
Table 11-11. SIO AC Specifications (continued)
11.4.3 USBIO
For operation in USB mode, Vddd range condition is 3.15 V ≤ Vddd ≤ 3.45 V (USB regulator bypassed) or 4.35 V ≤ Vddd ≤ 5.25 V
(USB regulator in use). For operation in GPIO mode, the standard range for Vddd applies, see
Table 11-12. USBIO DC Specifications
Document Number: 001-55036 Rev. *F
Fsioout
Fsioin
Rusbi
Rusba
Vohusb
Volusb
Vohgpio
Volgpio
Vdi
Vcm
Vse
Rps2
Rext
Zo
Cin
Iil
Parameter
Parameter
SIO output operating frequency
3.3 V < Vddio < 5.5 V, Unregulated
output (GPIO) mode, fast strong
drive mode
1.71 V < Vddio < 3.3 V, Unregulated
output (GPIO) mode, fast strong
drive mode
3.3 V < Vddio < 5.5 V, Unregulated
output (GPIO) mode, slow strong
drive mode
1.71 V < Vddio < 3.3 V, Unregulated
output (GPIO) mode, slow strong
drive mode
3.3 V < Vddio < 5.5 V, Regulated
output mode, fast strong drive mode
1.71 V < Vddio < 3.3 V, Regulated
output mode, fast strong drive mode
1.71 V < Vddio < 5.5 V, Regulated
output mode, slow strong drive
mode
SIO input operating frequency
USB D+ pull up resistance
USB D+ pull up resistance
Static output high
Static output low
Output voltage high, GPIO mode
Output voltage low, GPIO mode
Differential input sensitivity
Differential input common mode
range
Single ended receiver threshold
PS/2 pull up resistance
External USB series resistor
USB driver output impedance
USB transceiver input capacitance
Input leakage current (absolute
value)
1.71 V < Vddio < 5.5 V
Description
Description
PRELIMINARY
90/10% Vddio into 25 pF
90/10% Vddio into 25 pF
90/10% Vddio into 25 pF
90/10% Vddio into 25 pF
Output continuously switching into
25 pF
Output continuously switching into
25 pF
Output continuously switching into
25 pF
90/10% Vddio
With idle bus
While receiving traffic
15 k Ω ±5% to Vss, internal pull up
enabled
15 k Ω ±5% to Vss, internal pull up
enabled
Ioh = 4 mA, Vddd ≥ 3 V
Iol = 4 mA, Vddd ≥ 3 V
|(D+)-(D-)|
In PS/2 mode, with PS/2 pull up
enabled
In series with each USB pin
Including Rext
25°C, Vddd = 3.0 V
Conditions
Conditions
PSoC
®
Device Level Specifications
0.900
1.425
21.78
(-1%)
5: CY8C54 Family Data
Min
Min
2.8
2.4
0.8
0.8
28
3
-
-
-
-
-
-
-
-
-
-
-
-
-
Typ
Typ
22
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
(+1%)
1.575
3.090
22.22
Max
Max
2.5
3.6
0.3
0.3
0.2
2.5
33
16
20
10
66
44
20
5
4
2
7
2
-
on page 59.
Page 65 of 97
Units
Units
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
k Ω
k Ω
pF
nA
k Ω
V
V
V
V
V
V
V
Ω
Ω
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