MPC8349EVVAJFB Freescale, MPC8349EVVAJFB Datasheet - Page 81

• Manufacturer Part Number: MPC8349EVVAJFB
• Manufacturer: Freescale

Specifications of MPC8349EVVAJFB

• Family Name: MPC83xx
• Device Core: PowerQUICC II Pro
• Device Core Size: 32b
• Frequency (max): 533MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 1.2V
• Operating Supply Voltage (max): 1.26V
• Operating Supply Voltage (min): 1.14V
• Operating Temp Range: 0C to 105C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 672
• Package Type: TBGA
• Lead Free Status / RoHS Status: Compliant

have a low ESR (equivalent series resistance) rating to ensure the quick response time. They should also
be connected to the power and ground planes through two vias to minimize inductance. Suggested bulk
capacitors are 100–330 µF (AVX TPS tantalum or Sanyo OSCON).
21.4
To ensure reliable operation, connect unused inputs to an appropriate signal level. Unused active low
inputs should be tied to OV
connected to GND. All NC (no-connect) signals must remain unconnected.
Power and ground connections must be made to all external V
the MPC8349EA.
21.5
The MPC8349EA drivers are characterized over process, voltage, and temperature. For all buses, the
driver is a push-pull single-ended driver type (open drain for I
To measure Z
or GND. Then the value of each resistor is varied until the pad voltage is OV
output impedance is the average of two components, the resistances of the pull-up and pull-down devices.
When data is held high, SW1 is closed (SW2 is open) and R
OV
other in value. Then, Z
Two measurements give the value of this resistance and the strength of the driver current source. First, the
output voltage is measured while driving logic 1 without an external differential termination resistor. The
measured voltage is V
with an external precision differential termination resistor of value R
Freescale Semiconductor
DD
/2. R
Connection Recommendations
Output Buffer DC Impedance
P
MPC8349EA PowerQUICC II Pro Integrated Host Processor Hardware Specifications, Rev. 12
then becomes the resistance of the pull-up devices. R
0
for the single-ended drivers, an external resistor is connected from the chip pad to OV
1
0
= R
= (R
source
DD
P
, GV
+ R
Figure 42. Driver Impedance Measurement
× I
Data
N
DD
) ÷ 2.
source
, or LV
. Second, the output voltage is measured while driving logic 1
DD
as required. Unused active high inputs should be
P
Pad
R
R
is trimmed until the voltage at the pad equals
DD
N
OV
P
OGND
2
C).
, GV
DD
P
and R
SW2
SW1
term
DD
, LV
N
. The measured voltage is
are designed to be close to each
DD
DD
, OV
/2 (see
System Design Information
DD
, and GND pins of
Figure
42). The
DD
81