PPC440EP-3BC400C Applied Micro Circuits Corporation, PPC440EP-3BC400C Datasheet - Page 55

• Manufacturer Part Number: PPC440EP-3BC400C
• Manufacturer: Applied Micro Circuits Corporation

Specifications of PPC440EP-3BC400C

• Family Name: 440EP
• Device Core: PowerPC
• Device Core Size: 16b
• Frequency (max): 400MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 1.5/2.5V
• Operating Supply Voltage (max): 1.6/2.7V
• Operating Supply Voltage (min): 1.4/2.3V
• Operating Temp Range: -40C to 90C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 456
• Lead Free Status / RoHS Status: Not Compliant

Table 8. Signal Functional Description (Sheet 4 of 9)
Notes:
1. Receiver input has hysteresis
2. Must pull up (recommended value is 3kΩ to 3.3V)
3. Must pull down (recommended value is 1kΩ)
4. If not used, must pull up (recommended value is 3kΩ to 3.3V)
5. If not used, must pull down (recommended value is 1kΩ)
6. Strapping input during reset; pull-up or pull-down required
AMCC Proprietary
440EP – PPC440EP Embedded Processor
External Slave Peripheral Interface
DMAAck0:3
DMAReq0:3
EOT0:3/TC0:3
PerAddr02:07
PerAddr08:31
PerBLast
PerCS0:5
PerData00:15
PerOE
PerReady
PerR/W
PerWBE0:1
PerErr
Signal Name
Used by the PPC440EP to indicate that data transfers have
occurred.
Used by slave peripherals to indicate they are prepared to transfer
data.
End Of Transfer/Terminal Count.
Peripheral address bus used by PPC440EP when not in external
master mode, otherwise used by external master.
Peripheral address bus used by PPC440EP when not in external
master mode, otherwise used by external master.
Used by either the peripheral controller, DMA controller, or
external master to indicate the last transfer of a memory access.
External peripheral device select.
Peripheral data bus used by PPC440EP when not in external
master mode, otherwise used by external master.
Note: PerData00 is the most significant bit (msb) on this bus.
Used by either peripheral controller or DMA controller depending
upon the type of transfer involved. When the PPC440EP is the bus
master, it enables the selected device to drive the bus.
Used by a peripheral slave to indicate it is ready to transfer data.
Used by the PPC440EP when not in external master mode, as
output by either the peripheral controller or DMA controller
depending upon the type of transfer involved. High indicates a read
from memory, low indicates a write to memory.
Otherwise, it used by the external master as an input to indicate
the direction of transfer.
External peripheral data bus byte enables.
External Error. Used as an input to record external slave peripheral
errors.
Description
Revision 1.29 – May 07, 2008
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
O
O
I
I
Data Sheet
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
Multiplex
Multiplex
Multiplex
Type
Notes
1, 2
1, 4
1, 2
1, 2
1
1
2
1
2
1
55