RFM31B-868-S1 QUASAR, RFM31B-868-S1 Datasheet
RFM31B-868-S1
Specifications of RFM31B-868-S1
Related parts for RFM31B-868-S1
RFM31B-868-S1 Summary of contents
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... MCU. An integrated temperature sensor, general purpose ADC, power-on-reset (POR), and GPIOs further reduce overall system cost and size. The RFM31B's digital receive architecture features a high-performance ADC and DSP based modem which performs demodulation, filtering, and packet handling for increased flexibility and performance. ...
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... Receive Header Check . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Modem Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7.1. Modem Settings for FSK and GFSK . . . . . . . . . . . . . . . . . . . . . . . . . . 8. Auxiliary Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8.1. Smart Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .36 8.2. Microcontroller Clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .37 8.3. General Purpose ADC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .38 8.4. Temperature Sensor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .39 8.5. Low Battery Detector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .41 Tel: +86-755-82973805 Fax: +86-755-82973550 . . . . . . . . . . . . . . . . E-mail: sales@hoperf.com http://www.hoperf.com RFM31B Page . . .29 32 ...
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... RSSI and Clear Channel Assessment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47 9. Reference Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10. Register Table and Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11. Pin Descriptions: RFM31B . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12. Mechanical Dimension: RFM31B 13. Ordering Information: RFM31B . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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... Main Digital Regulator and Temperature Sensor ON, Crystal Oscillator and all other blocks OFF Crystal Oscillator and Main Digital Regulator ON, all other blocks OFF. Crystal Oscillator buffer disabled Synthesizer and regulators enabled E-mail: sales@hoperf.com http://www.hoperf.com RFM31B Min Typ Max Units 1.8 3.0 3 ...
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... RFM31B Table 2. Synthesizer AC Electrical Characteristics Parameter Symbol Synthesizer Frequency F Range Synthesizer Frequency F RES-LB Resolution F RES-HB Reference Frequency f REF_LV Input Level Synthesizer Settling Time t LOCK F Residual FM Phase Noise L(f Tel: +86-755-82973805 Fax: +86-755-82973550 5 Conditions SYN 433MHz band 868MHz band 915MHz band ...
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... BT = 0.5, channel spacing = 150 kHz Desired Ref Signal 3 dB above sensitivity. Interferer and desired modulated with 40 kbps kHz GFSK with BT = 0.5 Rejection at the image frequency. REJ IF=937 kHz Measured at RX pins E-mail: sales@hoperf.com http://www.hoperf.com RFM31B Min Typ Max Units 413 453 MHz 848 ...
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... RFM31B Table 4. Auxiliary Block Specifications Parameter Symbol Temperature Sensor Accuracy Temperature Sensor Sensitivity Low Battery Detector LBD Resolution Low Battery Detector LBD Conversion Time Microcontroller Clock Output Frequency General Purpose ADC ADC Resolution General Purpose ADC Bit ADC Resolution Temp Sensor & General ...
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... DRV<1:0>=LH OmaxLH I DRV<1:0>=HL OmaxHL I DRV<1:0>=HH OmaxHH V I < I source Omax V =1 < I sink Omax V =1 E-mail: sales@hoperf.com http://www.hoperf.com RFM31B Min Typ Max = 5 pF — — — — L — — V – 0.6 — DD — –100 — =1 – 0.6 — DD =1.8 V — ...
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... RFM31B Table 7. Absolute Maximum Ratings V to GND DD Voltage on Digital Control Inputs Voltage on Analog Inputs RX Input Power Operating Temperature Range (special crystal is used on the module) T Operating Temperature Range (Normal crystal is used on the module) T Thermal Impedance JA Storage Temperature Range T STG Note: Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only and functional operation of the device at or beyond these ratings in the operational sections of the specifications is not implied ...
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... A high precision local oscillator (LO) is generated by an integrated VCO and Fractional-N PLL synthesizer. The synthesizer is designed to support configurable data rates, output frequency and frequency deviation . The RFM31B is designed to work with a microcontroller to create a very low integrated on-chip which allows for a wide operating supply voltage range from SPI bus is used to communicate with an external microcontroller. Three are available. A complete list of the available GPIO functions is shown in " ...
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... Operating Modes The RFM31B provides several operating modes which can be used to optimize the power consumption for a given application. Depending upon the system communication protocol, an optimal trade-off between the radio wake time and power consumption can be achieved. Table8 summarizes the operating modes of the RFM31B. In general, any given operating mode may be classified as an active mode or a power saving mode ...
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... Select high period SW To read back data from the RFM31B,the R/W bit must be set to 0 followed by the 7-bit address of the register from which to read. The 8 bit DATA field following the 7-bit ADDR field is ignored n the SDI pin when R The next eight negative edge transitions of the SCLK signal will clock out the contents of the selected register. The data read from the selected register will be available on the SDO output pin ...
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... SPI address. When the nSEL bit is held low while continuing to send SCLK pulses, the SPI interface will automatically increment the ADDR and read from/write to the next address. An example burst write transaction is illustrated in Figure 4 and a burst read in Figure 5. As long as nSEL is held low, input data will be latched into the RFM31B every eight SCLK cycles. First Bit RW ...
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... RFM31B 3.2. Operating Mode Control There are three primary states in the RFM31B radio stat e machine:SHUTDOWN, IDLE, and RX (see Figure6).The SHUTDOWN state completely shuts down the radio to minimize current consumption. There are five different configurations/options for the IDLE state which can be selected to optimize the chip to the applications needs. ...
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... Operating Mode and Function Control 1" not necessary to set xton to 1 for this mode, the internal state machine automatically enables the crystal oscillator. Tel: +86-755-82973805 Fax: +86-755-82973550 Timer and 32kHz Clock E-mail: sales@hoperf.com http://www.hoperf.com RFM31B Source" for more 15 ...
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... RFM31B 3.2.3. RX State The RX state may be entered from any of the IDLE modes when the rxon bit is set "Register 07h. Operating Mode and Function Control 1". A built-in sequencer takes care of all the actions required to transition from one of the IDLE modes to the RX state. The following sequence of events will occur automatically to get the chip into RX mode when going from STANDBY mode to RX mode by setting the rxon bit: 1 ...
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... Interrupts The RFM31B is capable of generating an interrupt signal when certain events occur.The chip notifies the microcontroller that an interrupt event has occurred by setting the nIRQ output pin LOW = 0. This interrupt signal will be generated when any one (or more) of the interrupt events (corresponding to the Interrupt Status bits) shown below occur. The nIRQ pin will remain low until the microcontroller reads the Interrupt Status Register(s) (Registers 03h– ...
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... RFM31B 3.4. System Timing The system timing for RX mode is shown in Figure 7. The user only needs to program the desired mode, and the internal sequencer will properly transition the part from its current mode. The VCO will automatically calibrate at every frequency change or power up. The PLL T0 time is to allow for bias settling of the VCO. The PLL TS time is for the settling time of the PLL, which has a default setting of 100 µ ...
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... MHz hbsel E-mail: sales@hoperf.com http://www.hoperf.com RFM31B ers use the product website. , must be programmed into the RFM31B.Note ) F fixed offset can be added ( 24 ) 64000 ...
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... RFM31B fb[4:0] Value The chip will automatically shift the frequency of the Synthesizer down by 937.5 kHz (30 MHz ÷ 32) to achieve the correct Intermediate Frequency (IF) when RX mode is entered. Low-side injection is used in the RX Mixing architecture. Tel: +86-755-82973805 Fax: +86-755-82973550 20 Table 11. Frequency Band Selection N Frequency Band ...
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... Easy Frequency Programming for FHSS While Registers 73h–77h may be used to program the carrier frequency of the RFM31B,it is often easier to think in terms of “channels” or “channel numbers” rather than an absolute frequency value in Hz. Also, there may be some timing-critical applications (such as for Frequency Hopping Systems) in which it is desirable to change frequency by programming a single register. Once the channel step size is set, the frequency may be changed by a single register corresponding to the channel number. A nominal frequency is first set using Registers 73h– ...
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... RFM31B 3.5.4. Frequency Offset Adjustment When the AFC is disabled the frequency offset can be adjusted manually by fo[9:0] in registers 73h and 74h not possible to have both AFC and offset as internally they share the same register. The frequency offset adjustment and the AFC both are implemented by shifting the Synthesizer Local Oscillator frequency. This register is a signed register so in order to get a negative offset it is necessary to take the twos complement of the positive offset number ...
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... AFC_pull_in_range = ±AFCLimiter[7:0] x (hbsel+1) x 625 Hz The AFC Limiter register is an unsigned register and its value can be obtained from the Register Calculator spreadsheet. Tel: +86-755-82973805 Fax: +86-755-82973550 Frequency Correction AFC disabled Freq Offset Register AFC enabled AFC E-mail: sales@hoperf.com http://www.hoperf.com RFM31B 23 ...
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... RFM31B 4. Modulation Options 4.1. FIFO Mode In FIFO mode, the receive data is stored in integrated FIFO register memory. The FIFOs are accessed via "Register 7Fh. FIFO Access," and are most efficiently accessed with burst read/write operation as discussed in "3.1. Serial Peripheral Interface (SPI)" . ...
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... The received signal strength indicator (RSSI) provides a measure of the signal strength received on the tuned channel. The resolution of the RSSI is 0.5 dB. This high resolution RSSI enables accurate channel power Tel: +86-755-82973805 Fax: +86-755-82973550 TM features E-mail: sales@hoperf.com http://www.hoperf.com RFM31B 25 ...
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... RFM31B measurements for clear channel assessment (CCA), and carrier sense (CS) functionality. Frequency mistuning caused by crystal inaccuracies can be compensated by enabling the digital automatic frequency control (AFC) in receive mode. A comprehensive programmable packet handler including key features of create a variety of communication topologies ranging from peer-to-peer networks to mesh networks. The extensive programmability of the packet header allows for advanced packet filtering which in turn enables a mix of broadcast, group, and point-to-point communication ...
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... Capacitance 5.8. Regulators There are a total of six regulators integrated onto the RFM31B . With the exception of the digital regulator, all regulators are designed to operate with only internal decoupling. input supply voltage from +1.8 to +3.6V. A supply voltage should only be connected to the VDD pins. ...
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... RFM31B 6. Data Handling and Packet Handler The internal modem is designed to operate with a packet including a 10101... preamble structure. To configure the modem to operate with packet formats without a preamble or other legacy packet structures contact customer support. 6.1. RX FIFO A 64 byte FIFO is integrated into the chip for RX, as shown in Figure 11. "Register 7Fh. FIFO Access" is used to access the FIFO. A burst read, as described in " ...
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... FIFO, then there are options available for the different fields that will be stored into the FIFO. Figure 15 demonstrates the options and settings available when multiple packets are enabled. Figure 16 demonstrates the operation of fixed packet length and correct/incorrect packets. Tel: +86-755-82973805 Fax: +86-755-82973550 Data Figure 11. Packet Structure SYNC E-mail: sales@hoperf.com http://www.hoperf.com RFM31B CRC Bytes DATA 29 ...
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... RFM31B Transmission: Register H eader(s) Data Register L ength Data Data FIFO Figure 13. Multiple Packets in RX Packet Handler Initial state RX FIFO Addr. RX FIFO Addr. Write 0 0 Pointer 63 63 Figure 14. Multiple Packets in RX with CRC or Header Error Tel: +86-755-82973805 Fax: +86-755-82973550 30 RX FIFO Contents: ...
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... E-mail: sales@hoperf.com http://www.hoperf.com RFM31B Reserved encrc crc[1] crc[0] pkvalid crcerror Reserved Reserved hdch[3] hdch[2] hdch[1] hdch[0] fixpklen synclen[1] synclen[0] prealen[8] ...
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... Preamble = 0x00 6.5. Preamble Detector The RFM31B has integrated automatic preamble detection. The preamble length is configurable from 1–256 bytes using the prealen[7:0] field in "Register 33h. Header Control 2" and "Register 34h. Preamble Length," as described in “6.2. Packet Configuration.” The preamble detection threshold, preath[4:0] as set in "Register 35h. Preamble Detection Control 1" ...
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... Table 13 demonstrates the recommended preamble detection threshold and preamble length for various modes possible to use the RFM31B in a raw mode without the requirement for a 101010 preamble. Contact customer support for further details. ...
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... RFM31B initiated. The timeout period after preamble detections is defined as the value programmed into the sync word length plus four additional bits. 6.9. Receive Header Check The header check is designed to support 1–4 bytes and broadcast headers. The header length needs to be set in register 33h, hdlen[2:0] ...
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... The modulation index is equal to 2 times the peak deviation divided by the data rate (Rb). When Manchester coding is disabled, the required channel filter bandwidth is calculated 2Fd + Rb where Fd is the frequency deviation and Rb is the data rate. Tel: +86-755-82973805 Fax: +86-755-82973550 E-mail: sales@hoperf.com http://www.hoperf.com RFM31B 35 ...
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... Auxiliary Functions 8.1. Smart Reset The RFM31B contains an enhanced integrated SMART RESET or POR circuit. The POR circuit contains both a classic level threshold reset as well as a slope detector POR. This reset circuit was designed to produce a reliable reset signal under any circumstances. Reset will be initiated if any of the following conditions occur: ...
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... If the microcontroller clock option is being used there may be the need of a system clock for the microcontroller while the RFM31B is in SLEEP mode. Since the crystal oscillator is disabled in SLEEP mode in order to save current, the low-power 32.768 kHz clock can be automatically switched to become the microcontroller clock. This feature is called enable low frequency clock and is enabled by the enlfc bit in “ ...
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... RFM31B 8.3. General Purpose ADC An 8-bit SAR ADC is integrated for general purpose use, as well as for digitizing the on-chip temperature sensor reading. Registers 0Fh "ADC Configuration", 10h "Sensor Offset" and 4Fh "Amplifier Offset" can be used to configure the ADC operation. Every time an ADC conversion is desired, bit 7 "adcstart/adcbusy" in “Register 1Fh. Clock Recovery Gearshift Override” ...
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... Unit 0 –64 … 64 °C 1 –64 … 192 ° … 128 °C 1 –40 … 216 ° … 341 °K E-mail: sales@hoperf.com http://www.hoperf.com RFM31B tstrim[3] tstrim[2] vbgtrim[1] vbgtrim[0] tvoffs[3] tvoffs[2] tvoffs[1] tvoffs[0] Slope ADC8 LSB 8 mV/°C 0.5 °C 4 mV/°C 1 °C 8 mV/° ...
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... RFM31B Temperature Measurement with ADC8 300 250 200 150 100 50 0 -40 -20 Figure 20. Temperature Ranges using ADC8 Tel: +86-755-82973805 Fax: +86-755-82973550 Temperature [Celsius] E-mail: sales@hoperf.com http://www.hoperf.com Sensor Range 0 Sensor Range 1 Sensor Range 2 Sensor Range 3 100 ...
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... BatteryVol tage mV ADC Value VDD Voltage [V] 0 < 1.7 1 1.7–1.75 2 1.75–1.8 … … 29 3.1–3.15 30 3.15–3.2 31 > 3.2 E-mail: sales@hoperf.com http://www.hoperf.com RFM31B lbdt[3] lbdt[2] lbdt[1] lbdt[0] ADCValue POR Def. 14h — 41 ...
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... RFM31B 8.6. Wake-Up Timer and 32 kHz Clock Source The chip contains an integrated wake-up timer which can be used to periodically wake the chip from SLEEP mode. The wake-up timer runs from the internal 32.768 kHz RC Oscillator. The wake-up timer can be configured to run when in SLEEP mode. If enwt = 1 in "Register 07h. Operating Mode and Function Control 1" when entering SLEEP mode, the wake-up timer will count for a time specified defined in Registers 14– ...
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... GPIOX =00001 nIRQ SPI Interrupt Read Chip State Current Consumption Figure 21. WUT Interrupt and WUT Operation Tel: +86-755-82973805 Fax: +86-755-82973550 Interrupt Enable enwut =1 ( Reg 06h) Sleep Ready 1 Interrupt Enable enwut =0 ( Reg 06h) Sleep 1 uA E-mail: sales@hoperf.com http://www.hoperf.com RFM31B Sleep Ready Sleep 1 ...
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... RFM31B 8.7. Low Duty Cycle Mode The Low Duty Cycle Mode is available to automatically wake-up the receiver to check if a valid signal is available. The basic operation of the low duty cycle mode is demonstrated in the figure below valid preamble or sync word is not detected the chip will return to sleep mode until the beginning of a new WUT period valid preamble and sync are detected the receiver on period will be extended for the low duty cycle mode duration (TLDC) to receive all of the packet ...
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... This application uses antenna diversity so a GPIO is used to control the antenna switch. For a complete list of the available GPIO's see “ RFM31B Register Descriptions.” The GPIO drive strength may be adjusted with the gpioXdrv[1:0] bits. Setting a higher value will increase the drive strength and current capability of the GPIO by changing the driver size ...
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... RFM31B 8.9. Antenna Diversity To mitigate the problem of frequency-selective fading due to multi-path propagation, some radio systems use a scheme known as antenna diversity. In this scheme, two antennas are used. Each time the radio enters RX mode the receive signal strength from each antenna is evaluated. This evaluation process takes place during the preamble portion of the packet ...
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RSSI and Clear Channel Assessment Received signal strength indicator (RSSI estimate of the signal strength in the channel to which the receiver is tuned. The RSSI value can be read from an 8-bit register with 0.5 dB ...
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... RFM31B 9. Reference Design Figure 24.RFM31B Reference Design Schematic Tel: +86-755-82973805 Fax: +86-755-82973550 48 RFM31B E-mail: sales@hoperf.com http://www.hoperf.com ...
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... RFM31B 10. Register Table and Descriptions Add R/W Function/Desc 01 R Device Version 02 R Device Status 03 R Interrupt Status Interrupt Status 2 05 R/W Interrupt Enable 1 06 R/W Interrupt Enable 2 07 R/W Operating & Function Control 1 08 R/W Operating & Function Control 2 09 R/W ...
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... Reserved Reserved sgi agcen Reserved Reserved Reserved trclk[1] trclk[0] dtmod[1] fo[7] fo[6] fo[5] Reserved Reserved Reserved Fax: +86-755-82973550 E-mail: sales@hoperf.com http://www.hoperf.com RFM31B Data adrssia[4] adrssia[3] adrssia[2] adrssia[1] adrssib[4] adrssib[3] adrssib[2] adrssib[1] Afclim[4] Afclim[3] Afclim[2] Afclim[1] afc_corr[6] afc_corr[5] afc_corr[4] ...
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... R/W Frequency Hopping Channel Select 7A R/W Frequency Hopping Step Size 7B 7E R/W RX FIFO Control 7F R/W FIFO Access Note: Detailed register descriptions are available in “RFM31B Register Descriptions.” Tel: +86-755-82973805 51 Table 17. Register Descriptions (Continued Reserved sbsel hbsel fc[15] fc[14] fc[13] fc[7] fc[6] ...
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... Pin Descriptions: RFM31B Tel: +86-755-82973805 RFM31B-S1 RFM31B-S2 RFM31B-D IC Fax: +86-755-82973550 E-mail: sales@hoperf.com RFM31B 52 http://www.hoperf.com ...
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... RFM31B VCC S GND S GPIO_0 I/O GPIO_1 I/O GPIO_2 I/O SDO O SDI I SCLK I nSEL I nIRQ O I SDN ANT I/O NC Tel: +86-755-82973805 53 +1.8 to +3.6 V supply voltage. The recommended V Ground reference. General Purpose Digital I/O that may be configured through the registers to perform various functions including: Microcontroller Clock Output, FIFO status, POR, Wake-Up timer, Low Battery Detect, TRSW, AntDiversity control, etc ...
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... Mechanical Dimension: RFM31B Tel: +86-755-82973805 SMD PACKAGE（S1） SMD PACKAGE（S2） Fax: +86-755-82973550 E-mail: sales@hoperf.com RFM31B 54 http://www.hoperf.com ...
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... RFM31B Tel: +86-755-82973805 55 DIP PACKAGE（D） Fax: +86-755-82973550 E-mail: sales@hoperf.com http://www.hoperf.com ...
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... Part Number module type—operation band—package type = RFM31B—433—D module type operation band example：1，RFM31B module at 433MHz band, DIP : RFM31B-433-D。 2，RFM31B module at 868MHZ band, SMD, thickness at 4.9mm: RFM31B-868-S1。 Tel: +86-755-82973805 Package Fax: +86-755-82973550 E-mail: sales@hoperf.com RFM31B http://www ...
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... RFM31B HOPE MICROELECTRONICS CO.,LTD Add:4/F, Block B3, East Industrial Huaqiaocheng, Shenzhen, Guangdong, China Tel: 86-755-82973805 Fax: 86-755-82973550 Email: sales@hoperf.com rade@hoperf.com t Website: http://www.hoperf.com http://hoperf.en.alibaba.com Tel: +86-755-82973805 Fax: +86-755-82973550 This document may contain preliminary information and is subject to change by Hope Microelectronics without notice. Hope Microelectronics assumes no responsibility or liability for any use of the information contained herein ...